Commit graph

398228 commits

Author SHA1 Message Date
Brad Smith 89f0587154 [CMake] Re-enable use --gc-sections on OpenBSD
Most archs have switched to lld.
2021-09-04 14:18:30 -04:00
Dávid Bolvanský 2572c76ec9 [NFC] Added testcases for new binop with select transformation 2021-09-04 20:15:50 +02:00
Fangrui Song e03c8d309a [AsmPrinter] Remove unneeded MCSubtargetInfo temporary after D14346. NFC
The temporary object was used as a workaround when the target parser may
change STI. D14346 made the MCSubtargetInfo argument to
createMCAsmParser const, so we no longer need the temporary object.
2021-09-04 10:50:10 -07:00
Dávid Bolvanský 3a696f6092 [InstCombine] rotate(X,Z) eq/ne rotate(Y,Z) ---> X eq/ne Y (PR51565)
```

----------------------------------------
define i1 @src(i8 %x, i8 %y, i8 %z) {
%0:
  %f = fshl i8 %x, i8 %x, i8 %z
  %f2 = fshl i8 %y, i8 %y, i8 %z
  %r = icmp eq i8 %f, %f2
  ret i1 %r
}
=>
define i1 @tgt(i8 %x, i8 %y, i8 %z) {
%0:
  %r = icmp eq i8 %x, %y
  ret i1 %r
}
Transformation seems to be correct!

```

https://alive2.llvm.org/ce/z/qAZp8f

Solves PR51565

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D109271
2021-09-04 18:58:44 +02:00
Bjorn Pettersson 0f0344dd1e [SimpleLoopUnswitch] Inform pass manager when child loops are deleted
As part of the nontrivial unswitching we could end up removing child
loops. This patch add a notification to the pass manager when
that happens (using the markLoopAsDeleted callback).

Without this there could be stale LoopAccessAnalysis results cached
in the analysis manager. Those analysis results are cached based on
a Loop* as key. Since the BumpPtrAllocator used to allocate
Loop objects could be resetted between different runs of for
example the loop-distribute pass (running on different functions),
a new Loop object could be created using the same Loop pointer.
And then when requiring the LoopAccessAnalysis for the loop we
got the stale (corrupt) result from the destroyed loop.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D109257
2021-09-04 17:54:39 +02:00
Shivam Gupta 59c954f76a [LLDB][Docs] Indicate PS1 variable by $ 2021-09-04 20:57:59 +05:30
Kazu Hirata 15cd16aaf0 [Driver] Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
2021-09-04 08:05:27 -07:00
Shivam Gupta 5449d2da65 [NFC] Run clang-format on llvm/lib/Trget/AVR/
The current inconsistency confuse contributors which coding guidlines to follow.
It would be better to have it consistent using clang-format tool.

Reviewed By: mhjacobson

Differential Revision: https://reviews.llvm.org/D109270
2021-09-04 20:05:15 +05:30
Simon Pilgrim cb8d96e72f Fix Wdocumentation unknown parameter warning. NFCI. 2021-09-04 15:06:53 +01:00
Simon Pilgrim 2005ae15a6 [X86][SLM] WriteVecIMul instructions only take 1uop (REAPPLIED)
The xmm variant have half the throughput (and +1cy latency) of the mmx variants, but are still 1uop.

I still need to do more thorough testing of SLM on test-suite before fixing the obvious bad numbers for WritePMULLD.

But this helps the D103695 helper script get to more accurate numbers for vXi32 multiplies of extended operands (i.e. we can use PMADDWD, PMULLW/PMULHW etc). Matches what Intel AoM / Agner / llvm-exegesis reports.
2021-09-04 15:03:56 +01:00
Simon Pilgrim ac51d69208 Revert rG994da657076900f5ad7fe593c3b5e5f89ab3d53d "[X86][SLM] WriteVecIMul instructions only take 1uop"
This changed some codegen tests that I forgot about in my rebase, I'll recommit shortly with a fix.
2021-09-04 13:39:10 +01:00
Dávid Bolvanský 73e1ba6215 [NFC] Added tests for PR51565 2021-09-04 14:38:43 +02:00
Simon Pilgrim 994da65707 [X86][SLM] WriteVecIMul instructions only take 1uop
The xmm variant have half the throughput (and +1cy latency) of the mmx variants, but are still 1uop.

I still need to do more thorough testing of SLM on test-suite before fixing the obvious bad numbers for WritePMULLD.

But this helps the D103695 helper script get to more accurate numbers for vXi32 multiplies of extended operands (i.e. we can use PMADDWD, PMULLW/PMULHW etc). Matches what Intel AoM / Agner / llvm-exegesis reports.
2021-09-04 13:21:34 +01:00
Simon Pilgrim c6371020a8 [X86][SLM] RMW instructions don't require an extra uop
For RMW instructions, the load and store hold the MEC for an extra cycle, but within the same single uop. This is alluded to in the Intel AOM:

"The MEC also owns the MEC RSV, which is responsible for scheduling of all loads and stores. Load and
store instructions go through addresses generation phase in program order to avoid on-the-fly memory
ordering later in the pipeline. Therefore, an unknown address will stall younger memory instructions."

Noticed while trying to get a cheap SLM test box up and running with llvm-exegesis - RMW arithmetic is always 1uop - and matches what Agner / InstLatX64 report as well.
2021-09-04 13:21:34 +01:00
Simon Pilgrim da965a77d5 [X86][SLM] Fix MUL uops, latency and throughput
These were all set to the same best case mul i32 values (which seems to be the only version of MUL that SLM actually performs well with).

Noticed while trying to improve multiplication costs for vectorization via the D103695 helper script. Confirmed with Intel AoM / Agner / InstLatX64.
2021-09-04 13:21:34 +01:00
Eugene Zhulenev fd52b4357a [mlir] Async: check awaited operand error state after sync await
Previously only await inside the async function (coroutine after lowering to async runtime) would check the error state

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D109229
2021-09-04 05:00:17 -07:00
David Carlier 2833a2edac [Sanitizers] netbsd build fix due to wordexp interception. 2021-09-04 12:50:28 +01:00
Mark de Wever fea130cec9 [libc++][doc] Update format status.
Marked the entries solely depending on D103357 or D96664 as complete.
Initial work on implementing P2216 has started.
2021-09-04 13:31:29 +02:00
Simon Pilgrim 7d062d2c47 [X86][Atom] MUL/DIV instructions require both ports, not either.
Noticed while trying to improve multiplication costs for vectorization via the D103695 helper script. Confirmed with Intel AoM.
2021-09-04 11:58:09 +01:00
Simon Pilgrim 0d0f39b0f3 [X86][Atom] Add missing UOps override to AtomWriteResPair multiclass
Make it easier to describe microcoded instructions.
2021-09-04 11:58:09 +01:00
David Carlier 08c3cdb8b8 [Sanitizers][PGO] missing return statement 2021-09-04 11:40:58 +01:00
Mark de Wever df2af9936c [libc++][format] Add a CMake Unicode option.
This option is used to select between the format headers output column
width option. This option should be independent of the locale setting.
It's encouraged to default to Unicode unless the platform doesn't offer
that option.

[format.string.std]/10
```
  For the purposes of width computation, a string is assumed to be in a
  locale-independent, implementation-defined encoding. Implementations
  should use a Unicode encoding on platforms capable of displaying Unicode
```

Reviewed By: #libc, ldionne, vitaut

Differential Revision: https://reviews.llvm.org/D103379
2021-09-04 11:55:10 +02:00
LLVM GN Syncbot a1ea479f0a [gn build] Port d7444d9f41 2021-09-04 09:41:32 +00:00
Mark de Wever d7444d9f41 [libc++][format] Implement formatters.
This implements the initial version of the `std::formatter` class and its specializations. It also implements the following formatting functions:
- `format`
- `vformat`
- `format_to`
- `vformat_to`
- `format_to_n`
- `formatted_size`

All functions have a `char` and `wchar_t` version. Parsing the format-spec and
using the parsed format-spec hasn't been implemented. The code isn't optimized,
neither for speed, nor for size.

The goal is to have the rudimentary basics working, which can be used as a
basis to improve upon. The formatters used in this commit are simple stubs that
will be replaced by real formatters in later commits.

The formatters that are slated to be replaced in this patch series don't have
an availability macro to avoid merge conflicts.

Note the formatter for `bool` uses `0` and `1` instead of "false" and
"true". This will be fixed when the stub is replaced with a real
formatter.

Implements parts of:
- P0645 Text Formatting

Completes:
- LWG3539 format_to must not copy models of output_iterator<const charT&>

Reviewed By: ldionne, #libc, vitaut

Differential Revision: https://reviews.llvm.org/D96664
2021-09-04 11:41:08 +02:00
Nikita Popov 66a54af967 [WebAssembly] Support opaque pointers in AddMissingPrototypes
The change here is basically the same as in D108880: Rather than
looking at bitcasts, look at calls and their function type. We
still need to look through bitcasts to find those calls.

The change in llvm/test/CodeGen/WebAssembly/add-prototypes-conflict.ll
is due to different visitation order. add-prototypes-opaque-ptrs.ll
is a copy of add-prototypes.ll with -force-opaque-pointers.

Differential Revision: https://reviews.llvm.org/D109256
2021-09-04 11:25:42 +02:00
Dávid Bolvanský 9e06c767a4 [NFC] Added testcase for PR39116 2021-09-04 10:52:46 +02:00
Dávid Bolvanský 2aea581004 [NFC] Added testcase for PR48641 2021-09-04 10:44:39 +02:00
Kazuaki Ishizaki a1e7e401d2 [compiler-rt] NFC: Fix trivial typo
Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D77457
2021-09-04 14:12:58 +05:30
Balazs Benics d6ca91ea42 [clang][AST] Add support for SubstTemplateTypeParmPackType to ASTImporter
Thank you @martong for acquiring a suitable test case!

Reviewed By: shafik, martong

Differential Revision: https://reviews.llvm.org/D109237
2021-09-04 10:19:57 +02:00
Balazs Benics b97a96400a [analyzer] SValBuilder should have an easy access to AnalyzerOptions
`SVB.getStateManager().getOwningEngine().getAnalysisManager().getAnalyzerOptions()`
is quite a mouthful and might involve a few pointer indirections to get
such a simple thing like an analyzer option.

This patch introduces an `AnalyzerOptions` reference to the `SValBuilder`
abstract class, while refactors a few cases to use this /simpler/ accessor.

Reviewed By: martong, Szelethus

Differential Revision: https://reviews.llvm.org/D108824
2021-09-04 10:19:57 +02:00
Balazs Benics 91c07eb8ee [analyzer] Ignore single element arrays in getStaticSize() conditionally
Quoting https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html:
> In the absence of the zero-length array extension, in ISO C90 the contents
> array in the example above would typically be declared to have a single
> element.

We should not assume that the size of the //flexible array member// field has
a single element, because in some cases they use it as a fallback for not
having the //zero-length array// language extension.
In this case, the analyzer should return `Unknown` as the extent of the field
instead.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D108230
2021-09-04 10:19:57 +02:00
Kazuaki Ishizaki 8f77dc459e [clang] NFC: Fix trivial typo in comments and document
`the the` -> `the`

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D77470
2021-09-04 12:59:42 +05:30
Loren Maggiore 361458b1ce [mlir] create gpu memset op
Create a gpu memset op and corresponding CUDA and ROCm wrappers.

Reviewed By: herhut, lorenrose1013

Differential Revision: https://reviews.llvm.org/D107548
2021-09-04 08:13:04 +02:00
Kazu Hirata bb51f76fb1 [ForceFunctionAttrs] Add const (NFC) 2021-09-03 22:29:58 -07:00
Brad Smith bce178a5ec Fix for commit d8cd780631. 2021-09-03 21:20:37 -04:00
Brad Smith d8cd780631 [clang] OpenBSD does not support C11 atomics or threads. 2021-09-03 21:13:55 -04:00
Kevin Athey c7f50a445e Revert "[AArch64] Implement target hook function to decide folding (mul (add x, c1), c2)"
This reverts commit 095bea23d0.

Broke buildbot: https://lab.llvm.org/buildbot/#/builders/5/builds/11411
2021-09-03 18:08:58 -07:00
William S. Moses 21d43daf8f [MLIR] Primitive linkage lowering of FuncOp
FuncOp always lowers to an LLVM external linkage presently. This makes it impossible to define functions in mlir which are local to the current module. Until MLIR FuncOps have a more formal linkage specification, this commit allows funcop's to have an optionally specified llvm.linkage attribute, whose value will be used as the linkage of the llvm funcop when lowered.

Differential Revision: https://reviews.llvm.org/D108524

Support LLVM linkage
2021-09-03 20:41:39 -04:00
Brad Smith 775ab780fd Support linking against OpenMP runtime on OpenBSD. 2021-09-03 19:33:09 -04:00
Ben Shi 095bea23d0 [AArch64] Implement target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding if it leads to worse code.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D108871
2021-09-04 07:24:23 +08:00
Lang Hames 1ece14b652 [ORC] Silence a buggy GCC unused argument warning. 2021-09-04 08:45:36 +10:00
Richard Smith 02fe58d628 DebugInfo: additional fix missed in bc066e2. 2021-09-03 15:28:00 -07:00
Med Ismail Bennani 5f6f33da9e [lldb/Plugins] Move member template specialization out of class
This patch should fix the build failure that surfaced when build llvm
with GCC: https://lab.llvm.org/staging/#/builders/16/builds/10450

GCC complained that I explicitely specialized
 `ScriptedPythonInterface::ExtractValueFromPythonObject` in a
in non-namespace scope, which is tolerated by Clang.

To solve this issue, the specialization were declared out of the class
and implemented in the source file.

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2021-09-03 22:18:55 +00:00
Brad Smith b989662eb0 OpenBSD also needs execinfo 2021-09-03 17:33:48 -04:00
Mehdi Amini 78accf9f35 Make LLVM Linkage a first class attribute instead of using an integer attribute
This makes the IR more readable, in particular when this will be used on
the builtin func outside of the LLVM dialect.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D109209
2021-09-03 21:21:46 +00:00
Frederic Cambus 466451c661 [clang] Allow the OpenBSD driver to link the libclang_rt.profile library.
Differential Revision: https://reviews.llvm.org/D109244
2021-09-03 17:18:40 -04:00
David Blaikie bc066e26c9 DebugInfo: Fix a few bot failures for type dumping fixes 2021-09-03 14:08:58 -07:00
Michael Kruse 84e1258feb [flang] Use CMake to determine endianness.
The preprocessor definitions __BYTE_ORDER__, __ORDER_BIG_ENDIAN__, and
__ORDER_LITTLE_ENDIAN__ are gcc extensions (also supported by clang),
but msvc (and others) do not define them. As a result __BYTE_ORDER__
and __ORDER_BIG_ENDIAN__ both evaluate to 0 by the prepreprocessor,
and __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__, the first `#if` condition
to 1, hence assuming the wrong byte order for x86(_64).

This patch instead uses CMake's TestBigEndian module to determine
target architecture's endianness at configure-time.

Note this also uses the same mechanism for the runtime. If compiling
flang as a cross-compiler, the runtime for the compile-target must be
built separately (Flang does not support the LLVM_ENABLE_RUNTIMES
mechanism yet).

Fixes llvm.org/PR51597

Reviewed By: ijan1, Leporacanthicus

Differential Revision: https://reviews.llvm.org/D109108
2021-09-03 15:44:51 -05:00
Michael Jones 37ce7349f7 [libc] fix strtointeger hex prefix parsing
Fix edge case where "0x" would be considered a complete hexadecimal
number for purposes of str_end. Now the hexadecimal prefix needs a valid
digit after it, else just the 0 will be counted as the number.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D109084
2021-09-03 20:39:15 +00:00
Aart Bik eee1f1c8fb [mlir][sparse] add convenience method for sparse tensor setup
This simplifies setting up sparse tensors through C-style data structures.
Useful for runtimes that want to interact with MLIR-generated code
without knowning about all bufferization details (viz. memrefs).

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D109251
2021-09-03 13:35:59 -07:00