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Initial commit Signed-off-by: Christoph Heiss <contact@christoph-heiss.at>
2022-03-25 14:22:53 +01:00
__pycache__/
dist/
chore: Add some common development files Signed-off-by: Christoph Heiss <contact@christoph-heiss.at>
2022-03-26 21:24:10 +01:00
*.o
*.gtkw
*.vcd
feat: Add command to generate Verilog Signed-off-by: Christoph Heiss <contact@christoph-heiss.at>
2022-03-26 21:47:39 +01:00
*.v
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