Commit graph

357256 commits

Author SHA1 Message Date
Simon Pilgrim cb8a0ba829 [X86][SSE] Add LowerVectorAllZero helper for checking if all bits of a vector are zero.
Pull the lowering code out of LowerVectorAllZeroTest (and rename it MatchVectorAllZeroTest).

We should be able to reuse this in combineVectorSizedSetCCEquality as well.

Another cleanup to simplify D81547.
2020-06-15 15:54:38 +01:00
Stefan Pintilie 57c9dc0521 [PowerPC] Do not add the relocation addend to the instruction encoding
We should not be adding the relocation addend to the instruction encoding.
This patch removes that and sets those bits to zero.

Differential Revision: https://reviews.llvm.org/D81082
2020-06-15 09:51:34 -05:00
Florian Hahn 979720a9bb [DSE,MSSA] Add additional merging test cases (NFC).
Additional tests added ahead of partial overlapping store merging.
2020-06-15 15:45:07 +01:00
Dmitry Polukhin c98c94d85f [clang-tidy] Add diagnostics level to YAML output
Summary:
Also added BuildDirectory for completness and removed unused `Fix`.

Test Plan: check-all

Reviewers: alexfh, gribozavr2

Subscribers: xazax.hun, cfe-commits

Tags: #clang-tools-extra, #clang

Differential Revision: https://reviews.llvm.org/D79285
2020-06-15 07:40:53 -07:00
Dominik Montada 046566a1d5 [NFC] Remove unnecessary require global-isel from tests 2020-06-15 16:35:18 +02:00
Dominik Montada 87e5742654 [NFC] Add braces to if-statement in MachineVerifier 2020-06-15 16:33:56 +02:00
Simon Pilgrim ae33cbc494 [X86][SSE] LowerVectorAllZeroTest - add support for >256-bit vectors
Reduce by splitting the vector until we reach the target size for PTEST/MOVMSK_PCMPEQ. There might be some cases where AVX512 can perform this with 512-bit vectors but so far I haven't encountered any such pattern that reaches LowerVectorAllZeroTest.

Prep work for D81547
2020-06-15 15:30:24 +01:00
Hans Wennborg f47a776628 Revert "[X86] Separate imm from relocImm handling."
> relocImm was a complexPattern that handled both ConstantSDNode
> and X86Wrapper. But it was only applied selectively because using
> it would cause patterns to be not importable into FastISel or
> GlobalISel. So it only got applied to flag setting instructions,
> stores, RMW arithmetic instructions, and rotates.
>
> Most of the test changes are a result of making patterns available
> to GlobalISel or FastISel. The absolute-cmp.ll change is due to
> this fixing a pattern ordering issue to make an absolute symbol
> match to an 8-bit immediate before trying a 32-bit immediate.
>
> I tried to use PatFrags to reduce the repetition, but I was getting
> errors from TableGen.

This caused "Invalid EmitNode" assertions, see the llvm-commits thread for
discussion.
2020-06-15 16:14:59 +02:00
Simon Pilgrim 0b806549b5 [X86][SSE] LowerVectorAllZeroTest - remove unnecessary bitcasts
matchScalarReduction should return all its source vectors with the same type, so we can safely perform the OR reduction with the original type.

So we just need to bitcast for PTEST/PCMPEQB with the final reduced vector.
2020-06-15 15:13:13 +01:00
Yvan Roux ffe8f6d33b [ARM][MachineOutliner] Fix no-lr-save testcase.
Now that saving LR into a register is handled, some register constraints
are needed to keep machine-outliner-no-lr-save.mir meaningful.
2020-06-15 16:09:31 +02:00
Kevin P. Neal 07f3351284 [strictfp] Replace dangling strictfp attrs with nobuiltin
In preparation for a patch that will enforce new rules for the usage of
the strictfp attribute, this patch introduces auto-upgrade behavior that
will replace the strictfp attribute on callsites with nobuiltin if the
enclosing function declaration doesn't also have the strictfp attribute.

This auto-upgrade isn't being performed on .ll files because that would
prevent us from writing a test for the forthcoming verifier behavior.

Differential Revision: https://reviews.llvm.org/D70096
2020-06-15 10:05:35 -04:00
Jeff Mott 8799ebbc1f [clang] Fix or emit diagnostic for checked arithmetic builtins with
_ExtInt types

- Fix computed size for _ExtInt types passed to checked arithmetic
  builtins.
- Emit diagnostic when signed _ExtInt larger than 128-bits is passed
    to __builtin_mul_overflow.
- Change Sema checks for builtins to accept placeholder types.

Differential Revision: https://reviews.llvm.org/D81420
2020-06-15 06:51:54 -07:00
Marcel Koester 33879aa0bf [mlir] Fixed GCC compile issues and linking problems using SHARED_LIBS.
Differential Revision: https://reviews.llvm.org/D81839
2020-06-15 15:46:21 +02:00
Balázs Kéri efa8b6e884 [Analyzer][StreamChecker] Add check for pointer escape.
Summary:
After an escaped FILE* stream handle it is not possible to make
reliable checks on it because any function call can have effect
on it.

Reviewers: Szelethus, baloghadamsoftware, martong, NoQ

Reviewed By: NoQ

Subscribers: NoQ, rnkovacs, xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, gamesh411, Charusso, martong, ASDenysPetrov, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80699
2020-06-15 15:43:23 +02:00
Yvan Roux 669066de65 [ARM][MachineOutliner] Add LR RegSave mode.
Outline chunks of code which need to save and restore the link register
when a spare register can be used to it.

Differential Revision: https://reviews.llvm.org/D80127
2020-06-15 15:22:08 +02:00
Daniel Kiss b8ae3fdfa5 [AArch64] Fix BTI instruction emission.
Summary:
SCTLR_EL1.BT[01] controls the PACI[AB]SP compatibility with PBYTE 11
(see [1])
This bit will be set to zero so PACI[AB]SP are equal to BTI C
instruction only.

[1] https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/sctlr_el1

Reviewers: chill, tamas.petz, pbarrio, ostannard

Reviewed By: tamas.petz, ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81746
2020-06-15 15:04:36 +02:00
Jacques Pienaar 2d2c73c5cf [mlir] Remove OperandAdaptor
Use ::Adaptor alias instead uniformly. Makes the naming more consistent as
adaptor can refer to attributes now too.

Differential Revision: https://reviews.llvm.org/D81789
2020-06-15 06:01:31 -07:00
Matt Arsenault dae9554b2b AMDGPU/GlobalISel: Workaround some load/store type selection patterns
The logic is written for what loads/stores should be selectable. There
are a set of cases that should be selectable, but due to missing MVTs
and/or selection patterns, will fail to select. I think eventually
load/store select patterns should ignore the type and only look at the
value size, but until that happens, bitcast these to equivalent i32
vectors.
2020-06-15 07:42:20 -04:00
Matt Arsenault 96229606f9 AMDGPU/GlobalISel: Use less artifical example to avoid abort=0
These were failing due to an unlegalizable G_CONCAT_VECTORS due to
registers with types that are naturally illegal.
2020-06-15 07:37:15 -04:00
Matt Arsenault 33e9086501 GlobalISel: Support lowering vector->vector G_BITCAST
Extract subvectors and cast to the result element type before
remerging.
2020-06-15 07:36:30 -04:00
Sander de Smalen a06b2cb0f5 Fix clang/test/Modules/empty.modulemap by increasing limit.
This fixes a buildbot failure on Builder llvm-clang-win-x-aarch64.

The size of the module increased to just over 30kb due to new
Decl TypeDefs being added to the module after D81459 that
adds new ACLE types.
2020-06-15 12:27:25 +01:00
Tyker 51e4aa87e0 attempt to fix failing buildbots after 3bab88b7ba
Prevent IR-gen from emitting consteval declarations

Summary: with this patch instead of emitting calls to consteval function. the IR-gen will emit a store of the already computed result.
2020-06-15 12:58:37 +02:00
James Henderson 1a78904752 [DebugInfo] Report errors for truncated debug line standard opcode
Standard opcodes usually have ULEB128 arguments, so it is generally not
possible to recover from such errors. This patch causes the parser to
stop parsing the table in such situations.

Also don't emit the operands or add data to the table if there is an
error reading these opcodes.

Reviewed by: JDevlieghere

Differential Revision: https://reviews.llvm.org/D81470
2020-06-15 11:50:12 +01:00
Frederik Gossen a8c186c216 [MLIR][Standard] Simplify complex operand unpacking
Apply post-commit suggestions (see https://reviews.llvm.org/D79479).

Differential Revision: https://reviews.llvm.org/D81731
2020-06-15 10:45:56 +00:00
Frederik Gossen 361f664850 [MLIR][Standard] Add documentation for std.dim and fix test cases
Apply post-commit suggestions (see https://reviews.llvm.org/D81551).
Add documentation, simplify, and fix test cases.

Differential Revision: https://reviews.llvm.org/D81722
2020-06-15 10:40:36 +00:00
Kirill Bobyrev 9baba7cf66
Revert "[lld-macho] No need to explicitly specify -arch in tests"
This reverts commit 51c5baacf3 and also
337fb8c767 - "[lld-macho] Set REQUIRES:
x86 on more tests".

These patches cause test crashes:

http://lab.llvm.org:8011/builders/ppc64le-lld-multistage-test/builds/10054
2020-06-15 12:27:30 +02:00
Marcel Koester ff4c510337 [mlir] Extended BufferPlacement to support more sophisticated scenarios in which
allocations cannot be moved freely and can remain in divergent control flow.

The current BufferPlacement pass does not support allocation nodes that carry
additional dependencies (like in the case of dynamic shaped types). These
allocations can often not be moved freely and in turn might remain in divergent
control-flow branches. This requires a different strategy with respect to block
arguments and aliases. This CL adds additinal functionality to support
allocation nodes in divergent control flow while avoiding memory leaks.

Differential Revision: https://reviews.llvm.org/D79850
2020-06-15 12:19:23 +02:00
Kirill Bobyrev 550c4562d1 Revert "Prevent IR-gen from emitting consteval declarations"
This reverts commit 3bab88b7ba.

This patch causes test failures:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/17260
2020-06-15 12:14:15 +02:00
Georgii Rymar ec4e68e667 [yaml2obj] - Introduce the "NoHeaders" key for "SectionHeaderTable"
We have an issue currently. The following YAML piece just ignores the `Excluded` key.

```
SectionHeaderTable:
  Sections: []
  Excluded:
    - Name: .foo
```

Currently the meaning is: exclude the whole table.

The code checks that the `Sections` key is empty and doesn't catch/check
invalid/duplicated/missed `Excluded` entries.

Also there is no way to exclude all sections except the first null section,
because `Sections: []` currently just excludes the whole the sections header table.

To fix it, I suggest a change of the behavior.

1) A new `NoHeaders` key is added. It provides an explicit syntax to drop the whole table.
2) The meaning of the following is changed:

```
SectionHeaderTable:
  Sections: []
  Excluded:
    - Name: .foo

```
Assuming there are 2 sections in the object (a null section and `.foo`), with this patch it
means: exclude the `.foo` section, keep the null section. The null section is an implicit
section and I think it is reasonable to make "Sections: []" to mean it is implicitly added.
It will be consistent with the global "Sections" tag that is used to describe sections.

3) `SectionHeaderTable->Sections` is now optional. No `Sections` is the same as
   `Sections: []` (I think it avoids a confusion).
4) Using of `NoHeaders` together with `Sections`/`Excluded` is not allowed.
5) It is possible to use the `Excluded` key without the `Sections` key now (in this case
   `Excluded` must contain all sections).
6) `SectionHeaderTable:` or `SectionHeaderTable: []` is not allowed.
7) When the `SectionHeaderTable` key is present, we still require all sections to be
   present in `Sections` and `Excluded` lists. No changes here, we are still strict.

Differential revision: https://reviews.llvm.org/D81655
2020-06-15 12:43:16 +03:00
Simon Pilgrim 298377f4b0 [X86][SSE] Add tests for and/or reduction results compared to zero
These should fold to memcmp/ptest/movmsk+cmpeq patterns
2020-06-15 10:40:45 +01:00
Haojian Wu 1e87261ba1 [clangd] Turn on RecoveryAST for clangd by default.
Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81739
2020-06-15 11:26:32 +02:00
Kazushi (Jam) Marukawa e026f147f7 [VE] Support relocation information in MC layer
Summary:
Change VEAsmParser to support identification with relocation information
in assmebler.  Change VEAsmBackend to support relocation information in
MC layer.  Change VEDisassembler and VEMCCodeEmitter to support binary
generation of branch target operands.  Add REFLONG fixup and variant kind
to support new R_VE_REFLONG ELF symbol.  And, add regression test in both
MC and CodeGen to check binary genaration with relocation information.

Differential Revision: https://reviews.llvm.org/D81553
2020-06-15 11:24:53 +02:00
Dominik Montada c87bf29149 [MachineVerifier][GlobalISel] Check that branches have a MBB operand or are declared indirect. Add missing properties to G_BRJT, G_BRINDIRECT
Summary:
Teach MachineVerifier to check branches for MBB operands if they are not declared indirect.

Add `isBarrier`, `isIndirectBranch` to `G_BRINDIRECT` and `G_BRJT`.
Without these, `MachineInstr.isConditionalBranch()` was giving a
false-positive for those instructions.

Reviewers: aemerson, qcolombet, dsanders, arsenm

Reviewed By: dsanders

Subscribers: hiraditya, wdng, simoncook, s.egerton, arsenm, rovka, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81587
2020-06-15 11:17:09 +02:00
Max Kazantsev 9e4f674888 [Test] Add an example of unprofitable PR Phi insertion
This test demonstrates weird behavior of SimplifyCFG: seems that bigger
size of block leads to worse optimization choice.
2020-06-15 15:56:06 +07:00
Tyker 3bab88b7ba Prevent IR-gen from emitting consteval declarations
Summary: with this patch instead of emitting calls to consteval function. the IR-gen will emit a store of the already computed result.

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76420
2020-06-15 10:47:14 +02:00
Kirill Bobyrev 7808bf8431
NFC: Make sure function arguments have the same name in declaration and definition
This code generates Clang-Tidy warnings otherwise.
2020-06-15 10:45:08 +02:00
Alexander Belyaev cd320446f4 [mlir][shape] Lower Shape ConstSizeOp to Standard ConstantOp.
Differential Revision: https://reviews.llvm.org/D81735
2020-06-15 10:42:05 +02:00
Sam Parker 2596da3174 [CostModel] getCFInstrCost in getUserCost.
Have BasicTTI call the base implementation so that both agree on the
default behaviour, which the default being a cost of '1'. This has
required an X86 specific implementation as it seems to be very
reliant on those instructions being free. Changes are also made to
AMDGPU so that their implementations distinguish between cost kinds,
so that the unrolling isn't affected. PowerPC also has its own
implementation to prevent changes to the reg-usage vectorizer test.

The cost model test changes now reflect that ret instructions are not
generally free.

Differential Revision: https://reviews.llvm.org/D79164
2020-06-15 09:28:46 +01:00
Kirill Bobyrev 2d8f8c4de3
[lldb] Handle all Clang::Type::Builtin enums
Cleanup after https://reviews.llvm.org/D81459
2020-06-15 10:18:59 +02:00
Kristina Bessonova 5a39bf2dc5 [CMake][runtimes] Skip adding 2nd set of the same variables for a generic target
No need to parse and add the same variables twice if runtimes is being
built for a generic target (i.e. w/o multilib).

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D81574
2020-06-15 09:59:27 +02:00
Sam Parker 321ebfd175 [NFCI][CostModel] Unify FNeg cost
Enable TTIImpl::getUserCost to handle FNeg so that
getInstructionThroughput can call that instead. This means we can
remove the code in the AMDGPU backend too.

Differential Revision: https://reviews.llvm.org/D81635
2020-06-15 08:33:04 +01:00
Nikita Popov 7cac7e0cfc [IR] Prefer hasFnAttribute() where possible (NFC)
When checking for an enum function attribute, use hasFnAttribute()
rather than hasAttribute() at FunctionIndex, because it is
significantly faster (and more concise to boot).
2020-06-15 09:30:35 +02:00
Sam Parker 51541c068a [CostModel] Unify ExtractElement cost.
Move the cost modelling, with the reduction pattern matching, from
getInstructionThroughput into generic TTIImpl::getUserCost. The
modelling in the AMDGPU backend can now be removed.

Differential Revision: https://reviews.llvm.org/D81643
2020-06-15 08:27:14 +01:00
Max Kazantsev 60da4369a1 [NFC] Bail early simplifying unconditional branches 2020-06-15 13:59:53 +07:00
Fangrui Song 6c7aebbc01 [msan] Fix comment of __msan::Origin::isHeapOrigin 2020-06-14 23:58:49 -07:00
Sam Parker 3e39760f8e Revert "Return "[InstCombine] Simplify compare of Phi with constant inputs against a constant""
This reverts commit 23291b9863.

This caused performance regressions.
2020-06-15 07:46:28 +01:00
Sander de Smalen 98100353d7 [SVE] Ensure proper mangling of ACLE tuple types
The AAPCS specifies that the tuple types such as `svint32x2_t`
should use their `arm_sve.h` names when mangled instead of their
builtin names.

This patch also renames the internal types for the tuples to
be prefixed with `__clang_`, so they are not misinterpreted as
specified internal types like the non-tuple types which *are* defined
in the AAPCS. Using a builtin type for the tuples is a purely
a choice of the Clang implementation.

Reviewers: rsandifo-arm, c-rhodes, efriedma, rengolin

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81721
2020-06-15 07:36:12 +01:00
Sander de Smalen 91a4a592ed [SveEmitter] Add SVE tuple types and builtins for svundef.
This patch adds new SVE types to Clang that describe tuples of SVE
vectors. For example `svint32x2_t` which maps to the twice-as-wide
vector `<vscale x 8 x i32>`. Similarly, `svint32x3_t` will map to
`<vscale x 12 x i32>`.

It also adds builtins to return an `undef` vector for a given
SVE type.

Reviewers: c-rhodes, david-arm, ctetreau, efriedma, rengolin

Reviewed By: c-rhodes

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81459
2020-06-15 07:36:01 +01:00
Vitaly Buka ca2dcbd030 [SafeStack,NFC] Make StackColoring read-only
Move core which removes markers out of StackColoring.
2020-06-14 23:05:43 -07:00
Vitaly Buka c6426e2657 [SafeStack,NFC] Remove unneded branch 2020-06-14 23:05:43 -07:00