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rust/compiler/rustc_codegen_llvm
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Johnathan Van Why fd21eb18e9 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register. 
On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
2021-02-14 23:41:10 -08:00
..
src 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register. 2021-02-14 23:41:10 -08:00
Cargo.toml bumped smallvec deps 2021-02-14 18:03:11 +03:00
README.md mv compiler to compiler/ 2020-08-30 18:45:07 +03:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.