squiid/rust
1
0
Fork 0
Code Issues Pull requests Projects Activity

auto merge of #7094 : yichoi/rust/arm_jemalloc, r=thestinger

Browse source 
rt.mk : 
  in case of arm, add --disable-tls at jemalloc configure
  (to solve SEGV)
This commit is contained in:
bors 2013-06-12 22:16:12 -07:00
commit 9355330c1e
1 changed files with 12 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
mk/rt.mk
View file

@ -210,6 +210,17 @@ $$(LIBUV_LIB_$(1)_$(2)): $$(LIBUV_DEPS)
V=$$(VERBOSE)
endif
ifeq ($(OSTYPE_$(1)), linux-androideabi)
$$(JEMALLOC_LIB_$(1)_$(2)):
cd $$(CFG_BUILD_DIR)/rt/$(1)/stage$(2)/jemalloc; $(S)src/rt/jemalloc/configure \
--disable-experimental --build=$(CFG_BUILD_TRIPLE) --host=$(1) --disable-tls \
EXTRA_CFLAGS="$$(CFG_GCCISH_CFLAGS) $$(LIBUV_FLAGS_$$(HOST_$(1))) $$(SNAP_DEFINES)" \
LDFLAGS="$$(CFG_GCCISH_LINK_FLAGS) $$(LIBUV_FLAGS_$$(HOST_$(1)))" \
CC="$$(CC_$(1))" \
CXX="$$(CXX_$(1))" \
AR="$$(AR_$(1))"
$$(Q)$$(MAKE) -C $$(CFG_BUILD_DIR)/rt/$(1)/stage$(2)/jemalloc
else
$$(JEMALLOC_LIB_$(1)_$(2)):
cd $$(CFG_BUILD_DIR)/rt/$(1)/stage$(2)/jemalloc; $(S)src/rt/jemalloc/configure \
--disable-experimental --build=$(CFG_BUILD_TRIPLE) --host=$(1) \
@ -219,6 +230,7 @@ $$(JEMALLOC_LIB_$(1)_$(2)):
CXX="$$(CXX_$(1))" \
AR="$$(AR_$(1))"
$$(Q)$$(MAKE) -C $$(CFG_BUILD_DIR)/rt/$(1)/stage$(2)/jemalloc
endif
# These could go in rt.mk or rustllvm.mk, they're needed for both.