Removes reg aliases since there are many ABIs: o32/n32/n64

compiler/rustc_target/src/asm/mips.rs

@@ -45,31 +45,31 @@ impl MipsInlineAsmRegClass {
 // The reserved registers are somewhat taken from <https://git.io/JUR1k#L150>.
 def_regs! {
     Mips MipsInlineAsmReg MipsInlineAsmRegClass {
-        v0: reg = ["$2", "$v0"],
+        r2: reg = ["$2"],
-        v1: reg = ["$3", "$v1"],
+        r3: reg = ["$3"],
-        a0: reg = ["$4", "$a0"],
+        r4: reg = ["$4"],
-        a1: reg = ["$5", "$a1"],
+        r5: reg = ["$5"],
-        a2: reg = ["$6", "$a2"],
+        r6: reg = ["$6"],
-        a3: reg = ["$7", "$a3"],
+        r7: reg = ["$7"],
         // FIXME: Reserve $t0, $t1 if in mips16 mode.
-        t0: reg = ["$8", "$t0"],
+        r8: reg = ["$8"],
-        t1: reg = ["$9", "$t1"],
+        r9: reg = ["$9"],
-        t2: reg = ["$10", "$t2"],
+        r10: reg = ["$10"],
-        t3: reg = ["$11", "$t3"],
+        r11: reg = ["$11"],
-        t4: reg = ["$12", "$t4"],
+        r12: reg = ["$12"],
-        t5: reg = ["$13", "$t5"],
+        r13: reg = ["$13"],
-        t6: reg = ["$14", "$t6"],
+        r14: reg = ["$14"],
-        t7: reg = ["$15", "$t7"],
+        r15: reg = ["$15"],
-        s0: reg = ["$16", "$s0"],
+        r16: reg = ["$16"],
-        s1: reg = ["$17", "$s1"],
+        r17: reg = ["$17"],
-        s2: reg = ["$18", "$s2"],
+        r18: reg = ["$18"],
-        s3: reg = ["$19", "$s3"],
+        r19: reg = ["$19"],
-        s4: reg = ["$20", "$s4"],
+        r20: reg = ["$20"],
-        s5: reg = ["$21", "$s5"],
+        r21: reg = ["$21"],
-        s6: reg = ["$22", "$s6"],
+        r22: reg = ["$22"],
-        s7: reg = ["$23", "$s7"],
+        r23: reg = ["$23"],
-        t8: reg = ["$24", "$t8"],
+        r24: reg = ["$24"],
-        t9: reg = ["$25", "$t9"],
+        r25: reg = ["$25"],
         f0: freg = ["$f0"],
         f1: freg = ["$f1"],
         f2: freg = ["$f2"],
@@ -102,21 +102,21 @@ def_regs! {
         f29: freg = ["$f29"],
         f30: freg = ["$f30"],
         f31: freg = ["$f31"],
-        #error = ["$0", "$zero"] =>
+        #error = ["$0"] =>
             "constant zero cannot be used as an operand for inline asm",
-        #error = ["$1", "$at"] =>
+        #error = ["$1"] =>
             "reserved for assembler (Assembler Temp)",
-        #error = ["$26", "$k0"] =>
+        #error = ["$26"] =>
             "OS-reserved register cannot be used as an operand for inline asm",
-        #error = ["$27", "$k1"] =>
+        #error = ["$27"] =>
             "OS-reserved register cannot be used as an operand for inline asm",
-        #error = ["$28", "$gp"] =>
+        #error = ["$28"] =>
             "the global pointer cannot be used as an operand for inline asm",
-        #error = ["$29", "$sp"] =>
+        #error = ["$29"] =>
             "the stack pointer cannot be used as an operand for inline asm",
-        #error = ["$30", "$s8", "$fp"] =>
+        #error = ["$30"] =>
             "the frame pointer cannot be used as an operand for inline asm",
-        #error = ["$31", "$ra"] =>
+        #error = ["$31"] =>
             "the return address register cannot be used as an operand for inline asm",
     }
 }

src/doc/unstable-book/src/library-features/asm.md

@@ -602,7 +602,6 @@ Some registers have multiple names. These are all treated by the compiler as ide
 | ARM | `r13` | `sp` |
 | ARM | `r14` | `lr` |
 | ARM | `r15` | `pc` |
-| MIPS32 | `$[2-25]` | Please [see the Wikipedia page][mips-regs] |
 | RISC-V | `x0` | `zero` |
 | RISC-V | `x1` | `ra` |
 | RISC-V | `x2` | `sp` |
@@ -623,8 +622,6 @@ Some registers have multiple names. These are all treated by the compiler as ide
 | Hexagon | `r30` | `fr` |
 | Hexagon | `r31` | `lr` |
 
-[mips-regs]: https://en.wikibooks.org/wiki/MIPS_Assembly/Register_File#Registers
-
 Some registers cannot be used for input or output operands:
 
 | Architecture | Unsupported register | Reason |