From 3bd9d62963ec81bc54fd26f5f01758596cb97378 Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Sun, 15 Oct 2017 19:09:25 +0200 Subject: [PATCH 1/2] aarch64 is not whitelisted for ARM features --- src/librustc_trans/llvm_util.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/librustc_trans/llvm_util.rs b/src/librustc_trans/llvm_util.rs index 448feb5259d..d6cc3004f97 100644 --- a/src/librustc_trans/llvm_util.rs +++ b/src/librustc_trans/llvm_util.rs @@ -89,7 +89,7 @@ pub fn target_features(sess: &Session) -> Vec { let target_machine = create_target_machine(sess); let whitelist = match &*sess.target.target.arch { - "arm" => ARM_WHITELIST, + "arm" | "aarch64" => ARM_WHITELIST, "x86" | "x86_64" => X86_WHITELIST, "hexagon" => HEXAGON_WHITELIST, "powerpc" | "powerpc64" => POWERPC_WHITELIST, From 6020f3033561076f30062258b92a146b26a0e322 Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Mon, 16 Oct 2017 13:33:43 +0200 Subject: [PATCH 2/2] introduce a whitelist for aarch64 --- src/librustc_trans/llvm_util.rs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/librustc_trans/llvm_util.rs b/src/librustc_trans/llvm_util.rs index d6cc3004f97..4fe726364f2 100644 --- a/src/librustc_trans/llvm_util.rs +++ b/src/librustc_trans/llvm_util.rs @@ -73,6 +73,8 @@ unsafe fn configure_llvm(sess: &Session) { const ARM_WHITELIST: &'static [&'static str] = &["neon\0", "vfp2\0", "vfp3\0", "vfp4\0"]; +const AARCH64_WHITELIST: &'static [&'static str] = &["neon\0"]; + const X86_WHITELIST: &'static [&'static str] = &["avx\0", "avx2\0", "bmi\0", "bmi2\0", "sse\0", "sse2\0", "sse3\0", "sse4.1\0", "sse4.2\0", "ssse3\0", "tbm\0", "lzcnt\0", "popcnt\0", @@ -89,7 +91,8 @@ pub fn target_features(sess: &Session) -> Vec { let target_machine = create_target_machine(sess); let whitelist = match &*sess.target.target.arch { - "arm" | "aarch64" => ARM_WHITELIST, + "arm" => ARM_WHITELIST, + "aarch64" => AARCH64_WHITELIST, "x86" | "x86_64" => X86_WHITELIST, "hexagon" => HEXAGON_WHITELIST, "powerpc" | "powerpc64" => POWERPC_WHITELIST,