History

Nicolas Vasilache cc0a58d7cd [mlir][Vector] Fix masking logic in VectorToSCF Summary: The logic was conservative but inverted: cases that should remain unmasked became 1-D masked. Differential Revision: https://reviews.llvm.org/D84051		2020-07-17 13:24:07 -04:00
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cmake/modules	Install the MLIRTableGen static library.	2020-06-11 18:23:24 -07:00
docs	[MLIR] Add RegionKindInterface	2020-07-15 14:27:05 -07:00
examples	[MLIR] Add variadic isa<> for Type, Value, and Attribute	2020-06-29 15:04:48 -07:00
include	[mlir] [vector] Add an optional filter to vector contract lowering patterns.	2020-07-17 12:03:13 -04:00
integration_test	[mlir] Add alignment attribute to LLVM memory ops and use in vector.transfer	2020-07-13 17:35:20 -04:00
lib	[mlir][Vector] Fix masking logic in VectorToSCF	2020-07-17 13:24:07 -04:00
test	[mlir][Vector] Fix masking logic in VectorToSCF	2020-07-17 13:24:07 -04:00
tools	[MLIR][TableGen] Add default value for named attributes for 2 more build methods	2020-07-16 09:32:19 -07:00
unittests	[spirv] Use owning module ref to avoid leaks and fix ASAN tests	2020-07-16 17:30:59 -04:00
utils	[mlir][NFC] Remove usernames and google bug numbers from TODO comments.	2020-07-07 01:40:52 -07:00
.clang-format
.clang-tidy
CMakeLists.txt	Initial boiler-plate for python bindings.	2020-07-09 12:03:58 -07:00
LICENSE.TXT
README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.