fee40fef5c
This commit introduces the ROCDL Dialect (i.e. the ROCDL ops + the code to lower those ROCDL ops to LLWM intrinsics/functions). Think of ROCDL Dialect as analogous to the NVVM Dialect, but for AMD GPUs. This patch contains just the essentials needed to get a simple example up and running. We expect to make further additions to the ROCDL Dialect. This is the first of 3 commits, the follow-up will be: * add a pass that lowers GPU Dialect to ROCDL Dialect * add a "mlir-rocm-runner" utility Closes tensorflow/mlir#146 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/146 from deven-amd:deven-rocdl-dialect e78e8005c75a78912631116c78dc844fcc4b0de9 PiperOrigin-RevId: 271511259
44 lines
1.1 KiB
CMake
44 lines
1.1 KiB
CMake
add_llvm_library(MLIRTargetLLVMIRModuleTranslation
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LLVMIR/ModuleTranslation.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Target/LLVMIR
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DEPENDS
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intrinsics_gen
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)
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target_link_libraries(MLIRTargetLLVMIRModuleTranslation MLIRLLVMIR LLVMCore LLVMSupport LLVMTransformUtils MLIRTranslation)
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add_llvm_library(MLIRTargetLLVMIR
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LLVMIR/ConvertToLLVMIR.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Target/LLVMIR
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)
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target_link_libraries(MLIRTargetLLVMIR MLIRTargetLLVMIRModuleTranslation)
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add_llvm_library(MLIRTargetNVVMIR
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LLVMIR/ConvertToNVVMIR.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Target/LLVMIR
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DEPENDS
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intrinsics_gen
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)
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target_link_libraries(MLIRTargetNVVMIR
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MLIRGPU
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MLIRIR
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MLIRNVVMIR
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MLIRTargetLLVMIRModuleTranslation
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)
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add_llvm_library(MLIRTargetROCDLIR
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LLVMIR/ConvertToROCDLIR.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Target/LLVMIR
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DEPENDS
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intrinsics_gen
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)
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target_link_libraries(MLIRTargetROCDLIR
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MLIRGPU
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MLIRIR
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MLIRROCDLIR
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MLIRTargetLLVMIRModuleTranslation
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)
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