2f98c5febc
The ld might relax ADRP+ADD or ADRP+LDR sequences to the ADR+NOP, add the new case to the skipRelocation for aarch64. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D123334 |
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.. | ||
AArch64 | ||
Inputs | ||
runtime | ||
Unit | ||
X86 | ||
bad-exe.test | ||
bolt-icf.test | ||
bolt-info.test | ||
CMakeLists.txt | ||
heatmap.test | ||
invalid-profile.test | ||
keep-aranges.test | ||
link_fdata.py | ||
lit.cfg.py | ||
lit.site.cfg.py.in | ||
no-relocs.test | ||
non-empty-debug-line.test | ||
pie.test | ||
R_ABS.pic.lld.cpp | ||
re-optimize.test | ||
shared-object.test |