8d27be8dba
This patch introduces 2 new address spaces in OpenCL: global_device and global_host which are a subset of a global address space, so the address space scheme will be looking like: ``` generic->global->host ->device ->private ->local constant ``` Justification: USM allocations may be associated with both host and device memory. We want to give users a way to tell the compiler the allocation type of a USM pointer for optimization purposes. (Link to the Unified Shared Memory extension: https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/USM/cl_intel_unified_shared_memory.asciidoc) Before this patch USM pointer could be only in opencl_global address space, hence a device backend can't tell if a particular pointer points to host or device memory. On FPGAs at least we can generate more efficient hardware code if the user tells us where the pointer can point - being able to distinguish between these types of pointers at compile time allows us to instantiate simpler load-store units to perform memory transactions. Patch by Dmitry Sidorov. Reviewed By: Anastasia Differential Revision: https://reviews.llvm.org/D82174
128 lines
4 KiB
C++
128 lines
4 KiB
C++
//===--- TCE.h - Declare TCE target feature support -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares TCE TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_TCE_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_TCE_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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namespace clang {
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namespace targets {
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// llvm and clang cannot be used directly to output native binaries for
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// target, but is used to compile C code to llvm bitcode with correct
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// type and alignment information.
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//
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// TCE uses the llvm bitcode as input and uses it for generating customized
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// target processor and program binary. TCE co-design environment is
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// publicly available in http://tce.cs.tut.fi
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static const unsigned TCEOpenCLAddrSpaceMap[] = {
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0, // Default
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3, // opencl_global
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4, // opencl_local
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5, // opencl_constant
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0, // opencl_private
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1, // opencl_global_device
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1, // opencl_global_host
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// FIXME: generic has to be added to the target
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0, // opencl_generic
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0, // cuda_device
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0, // cuda_constant
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0, // cuda_shared
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0, // ptr32_sptr
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0, // ptr32_uptr
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0, // ptr64
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};
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class LLVM_LIBRARY_VISIBILITY TCETargetInfo : public TargetInfo {
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public:
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TCETargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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: TargetInfo(Triple) {
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TLSSupported = false;
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IntWidth = 32;
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LongWidth = LongLongWidth = 32;
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PointerWidth = 32;
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IntAlign = 32;
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LongAlign = LongLongAlign = 32;
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PointerAlign = 32;
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SuitableAlign = 32;
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SizeType = UnsignedInt;
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IntMaxType = SignedLong;
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IntPtrType = SignedInt;
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PtrDiffType = SignedInt;
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FloatWidth = 32;
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FloatAlign = 32;
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DoubleWidth = 32;
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DoubleAlign = 32;
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LongDoubleWidth = 32;
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LongDoubleAlign = 32;
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FloatFormat = &llvm::APFloat::IEEEsingle();
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DoubleFormat = &llvm::APFloat::IEEEsingle();
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LongDoubleFormat = &llvm::APFloat::IEEEsingle();
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resetDataLayout("E-p:32:32:32-i1:8:8-i8:8:32-"
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"i16:16:32-i32:32:32-i64:32:32-"
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"f32:32:32-f64:32:32-v64:32:32-"
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"v128:32:32-v256:32:32-v512:32:32-"
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"v1024:32:32-a0:0:32-n32");
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AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
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UseAddrSpaceMapMangling = true;
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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bool hasFeature(StringRef Feature) const override { return Feature == "tce"; }
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ArrayRef<Builtin::Info> getTargetBuiltins() const override { return None; }
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const char *getClobbers() const override { return ""; }
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BuiltinVaListKind getBuiltinVaListKind() const override {
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return TargetInfo::VoidPtrBuiltinVaList;
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}
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ArrayRef<const char *> getGCCRegNames() const override { return None; }
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &info) const override {
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return true;
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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return None;
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}
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};
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class LLVM_LIBRARY_VISIBILITY TCELETargetInfo : public TCETargetInfo {
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public:
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TCELETargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
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: TCETargetInfo(Triple, Opts) {
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BigEndian = false;
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resetDataLayout("e-p:32:32:32-i1:8:8-i8:8:32-"
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"i16:16:32-i32:32:32-i64:32:32-"
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"f32:32:32-f64:32:32-v64:32:32-"
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"v128:32:32-v256:32:32-v512:32:32-"
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"v1024:32:32-a0:0:32-n32");
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_TCE_H
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