b272698de7
OMP_MAP_TARGET_PARAM flag is used to mark the data that shoud be passed as arguments to the target kernels, nothing else. But the compiler still marks the data with OMP_MAP_TARGET_PARAM flags even if the data is passed to the data movement directives, like target data, target update etc. This flag is just ignored for this directives and the compiler does not need to emit it. Reviewed By: cchen Differential Revision: https://reviews.llvm.org/D91261
225 lines
15 KiB
C++
225 lines
15 KiB
C++
// RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -DCK1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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// CHECK-DAG: [[SIZES1:@.+]] = private unnamed_addr constant [5 x i64] zeroinitializer
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// 64 = 0x40 = OMP_MAP_RETURN_PARAM
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// CHECK-DAG: [[MAPTYPES1:@.+]] = private unnamed_addr constant [5 x i64] [i64 64, i64 64, i64 64, i64 64, i64 64]
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// 0 = OMP_MAP_NONE
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// 281474976710720 = 0x1000000000040 = OMP_MAP_MEMBER_OF | OMP_MAP_RETURN_PARAM
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// CHECK-DAG: [[MAPTYPES2:@.+]] = private unnamed_addr constant [5 x i64] [i64 0, i64 281474976710720, i64 281474976710720, i64 281474976710720, i64 281474976710720]
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struct S {
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int a = 0;
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int *ptr = &a;
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int &ref = a;
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int arr[4];
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S() {}
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void foo() {
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#pragma omp target data use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:a])
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++a, ++*ptr, ++ref, ++arr[0];
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}
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};
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int main() {
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float a = 0;
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float *ptr = &a;
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float &ref = a;
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float arr[4];
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float vla[(int)a];
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S s;
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s.foo();
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#pragma omp target data use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:(int)a], vla[0])
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++a, ++*ptr, ++ref, ++arr[0], ++vla[0];
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return a;
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}
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// CHECK-LABEL: @main()
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// CHECK: [[A_ADDR:%.+]] = alloca float,
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// CHECK: [[PTR_ADDR:%.+]] = alloca float*,
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// CHECK: [[REF_ADDR:%.+]] = alloca float*,
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// CHECK: [[ARR_ADDR:%.+]] = alloca [4 x float],
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// CHECK: [[BPTRS:%.+]] = alloca [5 x i8*],
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// CHECK: [[PTRS:%.+]] = alloca [5 x i8*],
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// CHECK: [[VLA_ADDR:%.+]] = alloca float, i64 %{{.+}},
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// CHECK: [[PTR:%.+]] = load float*, float** [[PTR_ADDR]],
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// CHECK: [[REF:%.+]] = load float*, float** [[REF_ADDR]],
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// CHECK: [[ARR:%.+]] = getelementptr inbounds [4 x float], [4 x float]* [[ARR_ADDR]], i64 0, i64 0
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// CHECK: [[BPTR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[BPTR0_A_ADDR:%.+]] = bitcast i8** [[BPTR0]] to float**
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// CHECK: store float* [[A_ADDR]], float** [[BPTR0_A_ADDR]],
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// CHECK: [[PTR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: [[PTR0_A_ADDR:%.+]] = bitcast i8** [[PTR0]] to float**
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// CHECK: store float* [[A_ADDR]], float** [[PTR0_A_ADDR]],
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// CHECK: [[BPTR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 1
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// CHECK: [[BPTR1_PTR_ADDR:%.+]] = bitcast i8** [[BPTR1]] to float**
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// CHECK: store float* [[PTR]], float** [[BPTR1_PTR_ADDR]],
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// CHECK: [[PTR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 1
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// CHECK: [[PTR1_PTR_ADDR:%.+]] = bitcast i8** [[PTR1]] to float**
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// CHECK: store float* [[PTR]], float** [[PTR1_PTR_ADDR]],
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// CHECK: [[BPTR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 2
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// CHECK: [[BPTR2_REF_ADDR:%.+]] = bitcast i8** [[BPTR2]] to float**
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// CHECK: store float* [[REF]], float** [[BPTR2_REF_ADDR]],
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// CHECK: [[PTR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 2
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// CHECK: [[PTR2_REF_ADDR:%.+]] = bitcast i8** [[PTR2]] to float**
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// CHECK: store float* [[REF]], float** [[PTR2_REF_ADDR]],
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// CHECK: [[BPTR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 3
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// CHECK: [[BPTR3_ARR_ADDR:%.+]] = bitcast i8** [[BPTR3]] to float**
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// CHECK: store float* [[ARR]], float** [[BPTR3_ARR_ADDR]],
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// CHECK: [[PTR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 3
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// CHECK: [[PTR3_ARR_ADDR:%.+]] = bitcast i8** [[PTR3]] to float**
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// CHECK: store float* [[ARR]], float** [[PTR3_ARR_ADDR]],
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// CHECK: [[BPTR4:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 4
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// CHECK: [[BPTR4_VLA_ADDR:%.+]] = bitcast i8** [[BPTR4]] to float**
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// CHECK: store float* [[VLA_ADDR]], float** [[BPTR4_VLA_ADDR]],
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// CHECK: [[PTR4:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 4
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// CHECK: [[PTR4_VLA_ADDR:%.+]] = bitcast i8** [[PTR4]] to float**
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// CHECK: store float* [[VLA_ADDR]], float** [[PTR4_VLA_ADDR]],
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// CHECK: [[BPTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[PTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: call void @__tgt_target_data_begin_mapper(%struct.ident_t* @{{.+}}, i64 -1, i32 5, i8** [[BPTR]], i8** [[PTR]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[SIZES1]], i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[MAPTYPES1]], i32 0, i32 0), i8** null, i8** null)
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// CHECK: [[A_REF:%.+]] = load float*, float** [[BPTR0_A_ADDR]],
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// CHECK: [[REF_REF:%.+]] = load float*, float** [[BPTR2_REF_ADDR]],
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// CHECK: store float* [[REF_REF]], float** [[TMP_REF_ADDR:%.+]],
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// CHECK: [[ARR:%.+]] = load float*, float** [[BPTR3_ARR_ADDR]],
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// CHECK: [[ARR_REF:%.+]] = bitcast float* [[ARR]] to [4 x float]*
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// CHECK: [[VLA_REF:%.+]] = load float*, float** [[BPTR4_VLA_ADDR]],
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// CHECK: [[A:%.+]] = load float, float* [[A_REF]],
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// CHECK: [[INC:%.+]] = fadd float [[A]], 1.000000e+00
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// CHECK: store float [[INC]], float* [[A_REF]],
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// CHECK: [[PTR_ADDR:%.+]] = load float*, float** [[BPTR1_PTR_ADDR]],
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// CHECK: [[VAL:%.+]] = load float, float* [[PTR_ADDR]],
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// CHECK: [[INC:%.+]] = fadd float [[VAL]], 1.000000e+00
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// CHECK: store float [[INC]], float* [[PTR_ADDR]],
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// CHECK: [[REF_ADDR:%.+]] = load float*, float** [[TMP_REF_ADDR]],
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// CHECK: [[REF:%.+]] = load float, float* [[REF_ADDR]],
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// CHECK: [[INC:%.+]] = fadd float [[REF]], 1.000000e+00
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// CHECK: store float [[INC]], float* [[REF_ADDR]],
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// CHECK: [[ARR0_ADDR:%.+]] = getelementptr inbounds [4 x float], [4 x float]* [[ARR_REF]], i64 0, i64 0
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// CHECK: [[ARR0:%.+]] = load float, float* [[ARR0_ADDR]],
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// CHECK: [[INC:%.+]] = fadd float [[ARR0]], 1.000000e+00
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// CHECK: store float [[INC]], float* [[ARR0_ADDR]],
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// CHECK: [[VLA0_ADDR:%.+]] = getelementptr inbounds float, float* [[VLA_REF]], i64 0
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// CHECK: [[VLA0:%.+]] = load float, float* [[VLA0_ADDR]],
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// CHECK: [[INC:%.+]] = fadd float [[VLA0]], 1.000000e+00
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// CHECK: store float [[INC]], float* [[VLA0_ADDR]],
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// CHECK: [[BPTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[PTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: call void @__tgt_target_data_end_mapper(%struct.ident_t* @{{.+}}, i64 -1, i32 5, i8** [[BPTR]], i8** [[PTR]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[SIZES1]], i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[MAPTYPES1]], i32 0, i32 0), i8** null, i8** null)
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// CHECK: foo
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// %this.addr = alloca %struct.S*, align 8
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// CHECK: [[BPTRS:%.+]] = alloca [5 x i8*],
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// CHECK: [[PTRS:%.+]] = alloca [5 x i8*],
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// CHECK: [[SIZES:%.+]] = alloca [5 x i64],
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// %tmp = alloca i32*, align 8
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// %tmp6 = alloca i32**, align 8
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// %tmp7 = alloca i32*, align 8
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// %tmp8 = alloca i32**, align 8
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// %tmp9 = alloca [4 x i32]*, align 8
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// store %struct.S* %this, %struct.S** %this.addr, align 8
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// %this1 = load %struct.S*, %struct.S** %this.addr, align 8
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// CHECK: [[A_ADDR:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS:%.+]], i32 0, i32 0
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// %ptr = getelementptr inbounds %struct.S, %struct.S* %this1, i32 0, i32 1
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// %ref = getelementptr inbounds %struct.S, %struct.S* %this1, i32 0, i32 2
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// %0 = load i32*, i32** %ref, align 8
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// CHECK: [[ARR_ADDR:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS]], i32 0, i32 3
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// CHECK: [[A_ADDR2:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS]], i32 0, i32 0
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// CHECK: [[PTR_ADDR:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS]], i32 0, i32 1
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// CHECK: [[REF_REF:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS]], i32 0, i32 2
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// CHECK: [[REF_PTR:%.+]] = load i32*, i32** [[REF_REF]],
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// CHECK: [[ARR_ADDR2:%.+]] = getelementptr inbounds %struct.S, %struct.S* [[THIS]], i32 0, i32 3
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// CHECK: [[ARR_END:%.+]] = getelementptr [4 x i32], [4 x i32]* [[ARR_ADDR]], i32 1
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// CHECK: [[BEGIN:%.+]] = bitcast i32* [[A_ADDR]] to i8*
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// CHECK: [[END:%.+]] = bitcast [4 x i32]* [[ARR_END]] to i8*
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// CHECK: [[E:%.+]] = ptrtoint i8* [[END]] to i64
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// CHECK: [[B:%.+]] = ptrtoint i8* [[BEGIN]] to i64
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// CHECK: [[DIFF:%.+]] = sub i64 [[E]], [[B]]
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// CHECK: [[SZ:%.+]] = sdiv exact i64 [[DIFF]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK: [[BPTR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[BPTR0_S:%.+]] = bitcast i8** [[BPTR0]] to %struct.S**
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// CHECK: store %struct.S* [[THIS]], %struct.S** [[BPTR0_S]],
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// CHECK: [[PTR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: [[PTR0_BEGIN:%.+]] = bitcast i8** [[PTR0]] to i32**
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// CHECK: store i32* [[A_ADDR]], i32** [[PTR0_BEGIN]],
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// CHECK: [[SIZE0:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 0
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// CHECK: store i64 [[SZ]], i64* [[SIZE0]],
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// CHECK: [[BPTR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 1
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// CHECK: [[BPTR1_A_ADDR:%.+]] = bitcast i8** [[BPTR1]] to i32**
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// CHECK: store i32* [[A_ADDR2]], i32** [[BPTR1_A_ADDR]],
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// CHECK: [[PTR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 1
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// CHECK: [[PTR1_A_ADDR:%.+]] = bitcast i8** [[PTR1]] to i32**
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// CHECK: store i32* [[A_ADDR2]], i32** [[PTR1_A_ADDR]],
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// CHECK: [[SIZE1:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 1
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// CHECK: store i64 0, i64* [[SIZE1]],
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// CHECK: [[BPTR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 2
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// CHECK: [[BPTR2_PTR_ADDR:%.+]] = bitcast i8** [[BPTR2]] to i32***
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// CHECK: store i32** [[PTR_ADDR]], i32*** [[BPTR2_PTR_ADDR]],
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// CHECK: [[PTR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 2
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// CHECK: [[PTR2_PTR_ADDR:%.+]] = bitcast i8** [[PTR2]] to i32***
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// CHECK: store i32** [[PTR_ADDR]], i32*** [[PTR2_PTR_ADDR]],
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// CHECK: [[SIZE2:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 2
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// CHECK: store i64 0, i64* [[SIZE2]],
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// CHECK: [[BPTR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 3
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// CHECK: [[BPTR3_REF_PTR:%.+]] = bitcast i8** [[BPTR3]] to i32**
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// CHECK: store i32* [[REF_PTR]], i32** [[BPTR3_REF_PTR]],
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// CHECK: [[PTR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 3
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// CHECK: [[PTR3_REF_PTR:%.+]] = bitcast i8** [[PTR3]] to i32**
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// CHECK: store i32* [[REF_PTR]], i32** [[PTR3_REF_PTR]],
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// CHECK: [[SIZE3:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 3
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// CHECK: store i64 0, i64* [[SIZE3]],
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// CHECK: [[BPTR4:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 4
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// CHECK: [[BPTR4_ARR_ADDR:%.+]] = bitcast i8** [[BPTR4]] to [4 x i32]**
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// CHECK: store [4 x i32]* [[ARR_ADDR2]], [4 x i32]** [[BPTR4_ARR_ADDR]],
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// CHECK: [[PTR4:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 4
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// CHECK: [[PTR4_ARR_ADDR:%.+]] = bitcast i8** [[PTR4]] to [4 x i32]**
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// CHECK: store [4 x i32]* [[ARR_ADDR2]], [4 x i32]** [[PTR4_ARR_ADDR]],
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// CHECK: [[SIZE4:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 4
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// CHECK: store i64 0, i64* [[SIZE4]],
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// CHECK: [[BPTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[PTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: [[SIZE:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 0
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// CHECK: call void @__tgt_target_data_begin_mapper(%struct.ident_t* @{{.+}}, i64 -1, i32 5, i8** [[BPTR]], i8** [[PTR]], i64* [[SIZE]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[MAPTYPES2]], i32 0, i32 0), i8** null, i8** null)
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// CHECK: [[A_ADDR:%.+]] = load i32*, i32** [[BPTR1_A_ADDR]],
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// CHECK: store i32* [[A_ADDR]], i32** [[A_REF:%.+]],
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// CHECK: [[PTR_ADDR:%.+]] = load i32**, i32*** [[BPTR2_PTR_ADDR]],
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// CHECK: store i32** [[PTR_ADDR]], i32*** [[PTR_REF:%.+]],
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// CHECK: [[REF_PTR:%.+]] = load i32*, i32** [[BPTR3_REF_PTR]],
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// CHECK: store i32* [[REF_PTR]], i32** [[REF_REF:%.+]],
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// CHECK: [[PTR_ADDR:%.+]] = load i32**, i32*** [[BPTR2_PTR_ADDR]],
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// CHECK: store i32** [[PTR_ADDR]], i32*** [[PTR_REF2:%.+]],
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// CHECK: [[ARR_ADDR:%.+]] = load [4 x i32]*, [4 x i32]** [[BPTR4_ARR_ADDR]],
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// CHECK: store [4 x i32]* [[ARR_ADDR]], [4 x i32]** [[ARR_REF:%.+]],
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// CHECK: [[A_ADDR:%.+]] = load i32*, i32** [[A_REF]],
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// CHECK: [[A:%.+]] = load i32, i32* [[A_ADDR]],
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// CHECK: [[INC:%.+]] = add nsw i32 [[A]], 1
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// CHECK: store i32 [[INC]], i32* [[A_ADDR]],
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// CHECK: [[PTR_PTR:%.+]] = load i32**, i32*** [[PTR_REF2]],
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// CHECK: [[PTR:%.+]] = load i32*, i32** [[PTR_PTR]],
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// CHECK: [[VAL:%.+]] = load i32, i32* [[PTR]],
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// CHECK: [[INC:%.+]] = add nsw i32 [[VAL]], 1
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// CHECK: store i32 [[INC]], i32* [[PTR]],
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// CHECK: [[REF_PTR:%.+]] = load i32*, i32** [[REF_REF]],
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// CHECK: [[VAL:%.+]] = load i32, i32* [[REF_PTR]],
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// CHECK: [[INC:%.+]] = add nsw i32 [[VAL]], 1
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// CHECK: store i32 [[INC]], i32* [[REF_PTR]],
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// CHECK: [[ARR_ADDR:%.+]] = load [4 x i32]*, [4 x i32]** [[ARR_REF]],
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// CHECK: [[ARR0_ADDR:%.+]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR_ADDR]], i64 0, i64 0
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// CHECK: [[VAL:%.+]] = load i32, i32* [[ARR0_ADDR]],
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// CHECK: [[INC:%.+]] = add nsw i32 [[VAL]], 1
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// CHECK: store i32 [[INC]], i32* [[ARR0_ADDR]],
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// CHECK: [[BPTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BPTRS]], i32 0, i32 0
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// CHECK: [[PTR:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[PTRS]], i32 0, i32 0
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// CHECK: [[SIZE:%.+]] = getelementptr inbounds [5 x i64], [5 x i64]* [[SIZES]], i32 0, i32 0
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// CHECK: call void @__tgt_target_data_end_mapper(%struct.ident_t* @{{.+}}, i64 -1, i32 5, i8** [[BPTR]], i8** [[PTR]], i64* [[SIZE]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* [[MAPTYPES2]], i32 0, i32 0), i8** null, i8** null)
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#endif
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