AMDGPU: Fix assert if v_mov_b32_dpp is last instruction in the block
This can happen if the use instruction is a phi. Fixes issue 49961
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@ -8071,7 +8071,7 @@ bool llvm::execMayBeModifiedBeforeAnyUse(const MachineRegisterInfo &MRI,
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auto &UseInst = *Use.getParent();
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// Don't bother searching between blocks, although it is possible this block
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// doesn't modify exec.
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if (UseInst.getParent() != DefBB)
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if (UseInst.getParent() != DefBB || UseInst.isPHI())
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return true;
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if (++NumUse > MaxUseScan)
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@ -883,3 +883,58 @@ body: |
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%5:vgpr_32 = V_ADD_CO_U32_e32 %4.sub0, %4.sub0, implicit-def $vcc, implicit $exec
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%6:vgpr_32 = V_ADDC_U32_e32 %4.sub1, %4.sub1, implicit-def $vcc, implicit $vcc, implicit $exec
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...
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# execMayBeModifiedBeforeAnyUse used to assert if the queried
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# V_MOV_B32_dpp was the last instruction in the block.
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---
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name: mov_dpp_last_block_inst
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: mov_dpp_last_block_inst
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; GCN: bb.0:
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; GCN-NEXT: successors: %bb.1(0x80000000)
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; GCN-NEXT: liveins: $vgpr0, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr8
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; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN-NEXT: [[DEF2:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.1:
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; GCN-NEXT: successors: %bb.2(0x80000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[DEF]], %bb.0, %5, %bb.2
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; GCN-NEXT: [[V_MOV_B32_dpp:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[PHI]], 323, 15, 15, 0, implicit $exec
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.2:
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; GCN-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[DEF2]], implicit $exec
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; GCN-NEXT: V_CMP_NE_U32_e32 1, [[V_CNDMASK_B32_e64_]], implicit-def $vcc, implicit $exec
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; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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; GCN-NEXT: S_BRANCH %bb.3
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.3:
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; GCN-NEXT: S_ENDPGM 0
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bb.0:
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liveins: $vgpr0, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8
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%0:sgpr_32 = COPY $sgpr8
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%1:vgpr_32 = IMPLICIT_DEF
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%2:sreg_32 = IMPLICIT_DEF
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%3:sreg_64_xexec = IMPLICIT_DEF
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bb.1:
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%4:vgpr_32 = PHI %1, %bb.0, %5, %bb.2
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%5:vgpr_32 = V_MOV_B32_dpp %1, %4, 323, 15, 15, 0, implicit $exec
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bb.2:
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%6:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %3, implicit $exec
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V_CMP_NE_U32_e32 1, %6, implicit-def $vcc, implicit $exec
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S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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S_BRANCH %bb.3
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bb.3:
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S_ENDPGM 0
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...
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