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Revert "[COFF, ARM64] Add __break intrinsic"

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This reverts commit 8a9b4fb4aa.
This commit is contained in:
Pengxuan Zheng 2022-04-20 11:57:49 -07:00
parent aa14e2ef3e
commit bff8356b19
10 changed files with 3 additions and 47 deletions
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2
clang/include/clang/Basic/BuiltinsAArch64.def
View file

@ -249,8 +249,6 @@ TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", "intrin.h", ALL_MS_LA
TARGET_HEADER_BUILTIN(__mulh, "SLLiSLLiSLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
TARGET_HEADER_BUILTIN(__break, "vi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
#undef BUILTIN
#undef LANGBUILTIN
#undef TARGET_HEADER_BUILTIN

9
clang/lib/CodeGen/CGBuiltin.cpp
View file

@ -9823,15 +9823,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, Metadata);
}
if (BuiltinID == AArch64::BI__break) {
Expr::EvalResult Result;
if (!E->getArg(0)->EvaluateAsInt(Result, CGM.getContext()))
llvm_unreachable("Sema will ensure that the parameter is constant");
llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::aarch64_break);
return Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0))});
}
if (BuiltinID == AArch64::BI__builtin_arm_clrex) {
Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex);
return Builder.CreateCall(F);

2
clang/lib/Headers/intrin.h
View file

@ -560,8 +560,6 @@ unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val);
__int64 __mulh(__int64 __a, __int64 __b);
unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b);
void __break(int);
#endif
/*----------------------------------------------------------------------------*\

3
clang/lib/Sema/SemaChecking.cpp
View file

@ -2948,9 +2948,6 @@ bool Sema::CheckAArch64BuiltinFunctionCall(const TargetInfo &TI,
if (BuiltinID == AArch64::BI__getReg)
return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31);
if (BuiltinID == AArch64::BI__break)
return SemaBuiltinConstantArgRange(TheCall, 0, 0, 0xffff);
if (CheckNeonBuiltinFunctionCall(TI, BuiltinID, TheCall))
return true;

7
clang/test/CodeGen/arm64-microsoft-intrinsics.c
View file

@ -103,13 +103,6 @@ unsigned long long check_umulh(unsigned long long a, unsigned long long b) {
// CHECK-MSVC: %[[RES:.*]] = trunc i128 %[[HIGH]] to i64
// CHECK-LINUX: error: call to undeclared function '__umulh'
void check__break() {
__break(0);
}
// CHECK-MSVC: call void @llvm.aarch64.break(i32 0)
// CHECK-LINUX: error: implicit declaration of function '__break'
unsigned __int64 check__getReg(void) {
unsigned volatile __int64 reg;
reg = __getReg(18);

6
clang/test/Sema/builtins-microsoft-arm64.c
View file

@ -3,12 +3,6 @@
#include <intrin.h>
void check__break(int x) {
__break(-1); // expected-error-re {{argument value {{.*}} is outside the valid range}}
__break(65536); // expected-error-re {{argument value {{.*}} is outside the valid range}}
__break(x); // expected-error {{argument to '__break' must be a constant integer}}
}
void check__getReg(void) {
__getReg(-1); // expected-error-re {{argument value {{.*}} is outside the valid range}}
__getReg(32); // expected-error-re {{argument value {{.*}} is outside the valid range}}

3
llvm/include/llvm/IR/IntrinsicsAArch64.td
View file

@ -62,9 +62,6 @@ def int_aarch64_frint64x
def int_aarch64_hint : DefaultAttrsIntrinsic<[], [llvm_i32_ty]>;
def int_aarch64_break : Intrinsic<[], [llvm_i32_ty],
[IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
//===----------------------------------------------------------------------===//
// Data Barrier Instructions

5
llvm/lib/Target/AArch64/AArch64InstrFormats.td
View file

@ -4529,9 +4529,8 @@ multiclass MemTagStore<bits<2> opc1, string insn> {
//---
let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in
class ExceptionGeneration<bits<3> op1, bits<2> ll, string asm,
list<dag> pattern = []>
: I<(outs), (ins timm32_0_65535:$imm), asm, "\t$imm", "", pattern>,
class ExceptionGeneration<bits<3> op1, bits<2> ll, string asm>
: I<(outs), (ins timm32_0_65535:$imm), asm, "\t$imm", "", []>,
Sched<[WriteSys]> {
bits<16> imm;
let Inst{31-24} = 0b11010100;

3
llvm/lib/Target/AArch64/AArch64InstrInfo.td
View file

@ -2432,8 +2432,7 @@ def : Pat<(AArch64call texternalsym:$func), (BL texternalsym:$func)>;
// Exception generation instructions.
//===----------------------------------------------------------------------===//
let isTrap = 1 in {
def BRK : ExceptionGeneration<0b001, 0b00, "brk",
[(int_aarch64_break timm32_0_65535:$imm)]>;
def BRK : ExceptionGeneration<0b001, 0b00, "brk">;
}
def DCPS1 : ExceptionGeneration<0b101, 0b01, "dcps1">;
def DCPS2 : ExceptionGeneration<0b101, 0b10, "dcps2">;

10
llvm/test/CodeGen/AArch64/arm64-break.ll
View file

@ -1,10 +0,0 @@
; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
define void @foo() nounwind {
; CHECK-LABEL: foo
; CHECK: brk #0x2
tail call void @llvm.aarch64.break(i32 2)
ret void
}
declare void @llvm.aarch64.break(i32 immarg) nounwind