Adding new tests to demonstrate code patterns with multiple or/and which can be combined with a single mask
This commit is contained in:
Biplob Mishra
parent
bf0f5e72bd
commit
90853d8f37
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@ -702,3 +702,183 @@ entry:
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%4 = or i64 %1, %3
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ret i64 %4
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}
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; Optimize pattern with multiple and/or to a simple pattern which can enable generation of rev16.
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define i64 @test_rev16_x_hwbyteswaps_complex1(i64 %a) nounwind {
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; CHECK-LABEL: test_rev16_x_hwbyteswaps_complex1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: lsr x8, x0, #48
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; CHECK-NEXT: lsr x9, x0, #8
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; CHECK-NEXT: lsr x10, x0, #32
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; CHECK-NEXT: and x11, x9, #0xff000000000000
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; CHECK-NEXT: lsr x12, x0, #16
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; CHECK-NEXT: bfi x11, x8, #56, #8
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; CHECK-NEXT: and x8, x9, #0xff00000000
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; CHECK-NEXT: orr x8, x11, x8
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; CHECK-NEXT: and x9, x9, #0xff0000
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; CHECK-NEXT: bfi x8, x10, #40, #8
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; CHECK-NEXT: orr x8, x8, x9
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; CHECK-NEXT: ubfiz x9, x0, #8, #8
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; CHECK-NEXT: bfi x8, x12, #24, #8
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; CHECK-NEXT: bfxil x8, x0, #8, #8
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; CHECK-NEXT: orr x0, x8, x9
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: test_rev16_x_hwbyteswaps_complex1:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: lsr x8, x0, #8
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; GISEL-NEXT: lsl x9, x0, #8
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; GISEL-NEXT: and x10, x8, #0xff000000000000
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; GISEL-NEXT: and x11, x9, #0xff00000000000000
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; GISEL-NEXT: orr x10, x10, x11
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; GISEL-NEXT: and x11, x8, #0xff00000000
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; GISEL-NEXT: orr x10, x10, x11
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; GISEL-NEXT: and x11, x9, #0xff0000000000
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; GISEL-NEXT: orr x10, x10, x11
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; GISEL-NEXT: and x11, x8, #0xff0000
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; GISEL-NEXT: orr x10, x10, x11
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; GISEL-NEXT: and x11, x9, #0xff000000
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; GISEL-NEXT: orr x10, x10, x11
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; GISEL-NEXT: and x8, x8, #0xff
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; GISEL-NEXT: orr x8, x10, x8
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; GISEL-NEXT: and x9, x9, #0xff00
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; GISEL-NEXT: orr x0, x8, x9
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; GISEL-NEXT: ret
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entry:
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%0 = lshr i64 %a, 8
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%1 = and i64 %0, 71776119061217280
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%2 = shl i64 %a, 8
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%3 = and i64 %2, -72057594037927936
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%4 = or i64 %1, %3
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%5 = and i64 %0, 1095216660480
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%6 = or i64 %4, %5
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%7 = and i64 %2, 280375465082880
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%8 = or i64 %6, %7
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%9 = and i64 %0, 16711680
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%10 = or i64 %8, %9
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%11 = and i64 %2, 4278190080
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%12 = or i64 %10, %11
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%13 = and i64 %0, 255
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%14 = or i64 %12, %13
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%15 = and i64 %2, 65280
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%16 = or i64 %14, %15
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ret i64 %16
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}
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define i64 @test_rev16_x_hwbyteswaps_complex2(i64 %a) nounwind {
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; CHECK-LABEL: test_rev16_x_hwbyteswaps_complex2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: lsr x9, x0, #48
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; CHECK-NEXT: lsr x10, x0, #32
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; CHECK-NEXT: lsr x8, x0, #8
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; CHECK-NEXT: lsr x11, x0, #16
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; CHECK-NEXT: and x8, x8, #0xff00ff00ff00ff
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; CHECK-NEXT: bfi x8, x9, #56, #8
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; CHECK-NEXT: bfi x8, x10, #40, #8
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; CHECK-NEXT: bfi x8, x11, #24, #8
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; CHECK-NEXT: bfi x8, x0, #8, #8
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; CHECK-NEXT: mov x0, x8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: test_rev16_x_hwbyteswaps_complex2:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: lsr x8, x0, #8
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; GISEL-NEXT: lsl x10, x0, #8
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; GISEL-NEXT: and x9, x8, #0xff000000000000
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; GISEL-NEXT: and x11, x8, #0xff00000000
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; GISEL-NEXT: orr x9, x9, x11
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; GISEL-NEXT: and x11, x8, #0xff0000
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; GISEL-NEXT: orr x9, x9, x11
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; GISEL-NEXT: and x8, x8, #0xff
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; GISEL-NEXT: orr x8, x9, x8
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; GISEL-NEXT: and x9, x10, #0xff00000000000000
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; GISEL-NEXT: orr x8, x8, x9
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; GISEL-NEXT: and x9, x10, #0xff0000000000
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; GISEL-NEXT: orr x8, x8, x9
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; GISEL-NEXT: and x9, x10, #0xff000000
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; GISEL-NEXT: orr x8, x8, x9
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; GISEL-NEXT: and x9, x10, #0xff00
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; GISEL-NEXT: orr x0, x8, x9
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; GISEL-NEXT: ret
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entry:
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%0 = lshr i64 %a, 8
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%1 = and i64 %0, 71776119061217280
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%2 = shl i64 %a, 8
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%3 = and i64 %0, 1095216660480
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%4 = or i64 %1, %3
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%5 = and i64 %0, 16711680
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%6 = or i64 %4, %5
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%7 = and i64 %0, 255
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%8 = or i64 %6, %7
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%9 = and i64 %2, -72057594037927936
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%10 = or i64 %8, %9
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%11 = and i64 %2, 280375465082880
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%12 = or i64 %10, %11
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%13 = and i64 %2, 4278190080
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%14 = or i64 %12, %13
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%15 = and i64 %2, 65280
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%16 = or i64 %14, %15
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ret i64 %16
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}
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; Optimize pattern with multiple and/or to a simple pattern which can enable generation of rev16.
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define i64 @test_rev16_x_hwbyteswaps_complex3(i64 %a) nounwind {
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; CHECK-LABEL: test_rev16_x_hwbyteswaps_complex3:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: lsr x8, x0, #48
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; CHECK-NEXT: lsr x9, x0, #8
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; CHECK-NEXT: lsr x10, x0, #32
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; CHECK-NEXT: and x11, x9, #0xff000000000000
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; CHECK-NEXT: lsr x12, x0, #16
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; CHECK-NEXT: bfi x11, x8, #56, #8
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; CHECK-NEXT: and x8, x9, #0xff00000000
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; CHECK-NEXT: orr x8, x8, x11
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; CHECK-NEXT: and x9, x9, #0xff0000
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; CHECK-NEXT: bfi x8, x10, #40, #8
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; CHECK-NEXT: orr x8, x9, x8
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; CHECK-NEXT: ubfiz x9, x0, #8, #8
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; CHECK-NEXT: bfi x8, x12, #24, #8
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; CHECK-NEXT: bfxil x8, x0, #8, #8
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; CHECK-NEXT: orr x0, x9, x8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: test_rev16_x_hwbyteswaps_complex3:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: lsr x8, x0, #8
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; GISEL-NEXT: lsl x9, x0, #8
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; GISEL-NEXT: and x10, x8, #0xff000000000000
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; GISEL-NEXT: and x11, x9, #0xff00000000000000
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; GISEL-NEXT: orr x10, x11, x10
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; GISEL-NEXT: and x11, x8, #0xff00000000
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; GISEL-NEXT: orr x10, x11, x10
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; GISEL-NEXT: and x11, x9, #0xff0000000000
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; GISEL-NEXT: orr x10, x11, x10
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; GISEL-NEXT: and x11, x8, #0xff0000
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; GISEL-NEXT: orr x10, x11, x10
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; GISEL-NEXT: and x11, x9, #0xff000000
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; GISEL-NEXT: orr x10, x11, x10
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; GISEL-NEXT: and x8, x8, #0xff
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; GISEL-NEXT: orr x8, x8, x10
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; GISEL-NEXT: and x9, x9, #0xff00
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; GISEL-NEXT: orr x0, x9, x8
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; GISEL-NEXT: ret
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entry:
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%0 = lshr i64 %a, 8
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%1 = and i64 %0, 71776119061217280
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%2 = shl i64 %a, 8
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%3 = and i64 %2, -72057594037927936
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%4 = or i64 %3, %1
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%5 = and i64 %0, 1095216660480
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%6 = or i64 %5, %4
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%7 = and i64 %2, 280375465082880
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%8 = or i64 %7, %6
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%9 = and i64 %0, 16711680
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%10 = or i64 %9, %8
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%11 = and i64 %2, 4278190080
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%12 = or i64 %11, %10
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%13 = and i64 %0, 255
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%14 = or i64 %13, %12
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%15 = and i64 %2, 65280
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%16 = or i64 %15, %14
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ret i64 %16
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}
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