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[Hexagon] Add ELF flags for Hexagon v69

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This commit is contained in:
Krzysztof Parzyszek 2021-12-21 08:39:59 -08:00
parent ada028c32f
commit 7a641d2499
2 changed files with 29 additions and 23 deletions
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4
llvm/include/llvm/BinaryFormat/ELF.h
View file

@ -608,6 +608,8 @@ enum {
EF_HEXAGON_MACH_V67 = 0x00000067, // Hexagon V67
EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T
EF_HEXAGON_MACH_V68 = 0x00000068, // Hexagon V68
EF_HEXAGON_MACH_V69 = 0x00000069, // Hexagon V69
EF_HEXAGON_MACH = 0x000003ff, // Hexagon V..
// Highest ISA version flags
EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
@ -623,6 +625,8 @@ enum {
EF_HEXAGON_ISA_V66 = 0x00000066, // Hexagon V66 ISA
EF_HEXAGON_ISA_V67 = 0x00000067, // Hexagon V67 ISA
EF_HEXAGON_ISA_V68 = 0x00000068, // Hexagon V68 ISA
EF_HEXAGON_ISA_V69 = 0x00000069, // Hexagon V69 ISA
EF_HEXAGON_ISA = 0x000003ff, // Hexagon V.. ISA
};
// Hexagon-specific section indexes for common small data

48
llvm/lib/ObjectYAML/ELFYAML.cpp
View file

@ -464,29 +464,31 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_MIPS_ARCH_64R6, EF_MIPS_ARCH);
break;
case ELF::EM_HEXAGON:
BCase(EF_HEXAGON_MACH_V2);
BCase(EF_HEXAGON_MACH_V3);
BCase(EF_HEXAGON_MACH_V4);
BCase(EF_HEXAGON_MACH_V5);
BCase(EF_HEXAGON_MACH_V55);
BCase(EF_HEXAGON_MACH_V60);
BCase(EF_HEXAGON_MACH_V62);
BCase(EF_HEXAGON_MACH_V65);
BCase(EF_HEXAGON_MACH_V66);
BCase(EF_HEXAGON_MACH_V67);
BCase(EF_HEXAGON_MACH_V67T);
BCase(EF_HEXAGON_MACH_V68);
BCase(EF_HEXAGON_ISA_V2);
BCase(EF_HEXAGON_ISA_V3);
BCase(EF_HEXAGON_ISA_V4);
BCase(EF_HEXAGON_ISA_V5);
BCase(EF_HEXAGON_ISA_V55);
BCase(EF_HEXAGON_ISA_V60);
BCase(EF_HEXAGON_ISA_V62);
BCase(EF_HEXAGON_ISA_V65);
BCase(EF_HEXAGON_ISA_V66);
BCase(EF_HEXAGON_ISA_V67);
BCase(EF_HEXAGON_ISA_V68);
BCaseMask(EF_HEXAGON_MACH_V2, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V3, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V4, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V5, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V55, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V60, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V62, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V65, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V66, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V67, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V67T, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V68, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V69, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_ISA_V2, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V3, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V4, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V5, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V55, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V60, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V62, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V65, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V66, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V67, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V68, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V69, EF_HEXAGON_ISA);
break;
case ELF::EM_AVR:
BCaseMask(EF_AVR_ARCH_AVR1, EF_AVR_ARCH_MASK);