[Hexagon][bolt] Remove unneeded cl::ZeroOrMore for cl::opt options. NFC
Similar to 557efc9a8b
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734c223445
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@ -77,7 +77,6 @@ EnableBAT("enable-bat",
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cl::cat(BoltCategory));
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cl::opt<bool> RemoveSymtab("remove-symtab", cl::desc("Remove .symtab section"),
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cl::init(false), cl::ZeroOrMore,
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cl::cat(BoltCategory));
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cl::opt<unsigned>
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@ -62,10 +62,11 @@ static cl::opt<unsigned>
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MaxORLSize("insert-max-orl", cl::init(4096), cl::Hidden,
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cl::desc("Maximum size of OrderedRegisterList"));
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static cl::opt<unsigned> MaxIFMSize("insert-max-ifmap", cl::init(1024),
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cl::Hidden, cl::ZeroOrMore, cl::desc("Maximum size of IFMap"));
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cl::Hidden,
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cl::desc("Maximum size of IFMap"));
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static cl::opt<bool> OptTiming("insert-timing", cl::init(false), cl::Hidden,
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cl::ZeroOrMore, cl::desc("Enable timing of insert generation"));
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static cl::opt<bool> OptTiming("insert-timing", cl::Hidden, cl::ZeroOrMore,
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cl::desc("Enable timing of insert generation"));
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static cl::opt<bool>
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OptTimingDetail("insert-timing-detail", cl::Hidden,
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cl::desc("Enable detailed timing of insert "
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@ -97,9 +97,9 @@ static cl::opt<bool> BranchRelaxAsmLarge("branch-relax-asm-large",
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cl::init(true), cl::Hidden,
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cl::desc("branch relax asm"));
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static cl::opt<bool> UseDFAHazardRec("dfa-hazard-rec",
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cl::init(true), cl::Hidden, cl::ZeroOrMore,
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cl::desc("Use the DFA based hazard recognizer."));
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static cl::opt<bool>
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UseDFAHazardRec("dfa-hazard-rec", cl::init(true), cl::Hidden,
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cl::desc("Use the DFA based hazard recognizer."));
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/// Constants for Hexagon instructions.
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const int Hexagon_MEMW_OFFSET_MAX = 4095;
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@ -42,8 +42,8 @@ using namespace llvm;
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static cl::opt<bool> EnableBSBSched("enable-bsb-sched", cl::Hidden,
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cl::init(true));
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static cl::opt<bool> EnableTCLatencySched("enable-tc-latency-sched",
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cl::Hidden, cl::ZeroOrMore, cl::init(false));
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static cl::opt<bool> EnableTCLatencySched("enable-tc-latency-sched", cl::Hidden,
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cl::init(false));
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static cl::opt<bool>
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EnableDotCurSched("enable-cur-sched", cl::Hidden, cl::init(true),
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@ -69,7 +69,7 @@ static cl::opt<bool> SchedPredsCloser("sched-preds-closer", cl::Hidden,
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cl::init(true));
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static cl::opt<bool> SchedRetvalOptimization("sched-retval-optimization",
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cl::Hidden, cl::ZeroOrMore, cl::init(true));
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cl::Hidden, cl::init(true));
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static cl::opt<bool> EnableCheckBankConflict(
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"hexagon-check-bank-conflict", cl::Hidden, cl::init(true),
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@ -36,8 +36,8 @@ static cl::opt<bool>
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EnableCExtOpt("hexagon-cext", cl::Hidden, cl::init(true),
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cl::desc("Enable Hexagon constant-extender optimization"));
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static cl::opt<bool> EnableRDFOpt("rdf-opt", cl::Hidden, cl::ZeroOrMore,
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cl::init(true), cl::desc("Enable RDF-based optimizations"));
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static cl::opt<bool> EnableRDFOpt("rdf-opt", cl::Hidden, cl::init(true),
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cl::desc("Enable RDF-based optimizations"));
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static cl::opt<bool> DisableHardwareLoops("disable-hexagon-hwloops",
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cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"));
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@ -71,9 +71,9 @@ static cl::opt<bool>
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EnableGenAllInsnClass("enable-gen-insn", cl::Hidden,
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cl::desc("Generate all instruction with TC"));
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static cl::opt<bool> DisableVecDblNVStores("disable-vecdbl-nv-stores",
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cl::init(false), cl::Hidden, cl::ZeroOrMore,
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cl::desc("Disable vector double new-value-stores"));
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static cl::opt<bool>
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DisableVecDblNVStores("disable-vecdbl-nv-stores", cl::Hidden,
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cl::desc("Disable vector double new-value-stores"));
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extern cl::opt<bool> ScheduleInlineAsm;
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