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[RISCV] Insert VSETVLI at the end of a basic block if we didn't produce BlockInfo.Exit.

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This is an alternative to D118667 that instead of fixing the store
to match phase 1, it tries to detect the mismatch with the expected
value at the end of the block. This inserts a vsetvli after the vse
to satisfy the requirement of the other basic block.

We still have serious design issues in the pass, that is going to
require some rethinking.

Differential Revision: https://reviews.llvm.org/D119518
This commit is contained in:
Craig Topper 2022-02-10 21:33:08 -08:00
parent f35ac872b8
commit 541c9ba842
2 changed files with 16 additions and 3 deletions
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15
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
View file

@ -334,6 +334,10 @@ public:
return false;
}
bool operator!=(const VSETVLIInfo &Other) const {
return !(*this == Other);
}
// Calculate the VSETVLIInfo visible to a block assuming this and Other are
// both predecessors.
VSETVLIInfo intersect(const VSETVLIInfo &Other) const {
@ -1096,6 +1100,17 @@ void RISCVInsertVSETVLI::emitVSETVLIs(MachineBasicBlock &MBB) {
CurInfo = VSETVLIInfo::getUnknown();
PrevVSETVLIMI = nullptr;
}
// If we reach the end of the block and our current info doesn't match the
// expected info, insert a vsetvli to correct.
if (MI.isTerminator()) {
const VSETVLIInfo &ExitInfo = BlockInfo[MBB.getNumber()].Exit;
if (CurInfo.isValid() && ExitInfo.isValid() && !ExitInfo.isUnknown() &&
CurInfo != ExitInfo) {
insertVSETVLI(MBB, MI, ExitInfo, CurInfo);
CurInfo = ExitInfo;
}
}
}
}

4
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
View file

@ -592,12 +592,10 @@ body: |
; CHECK-NEXT: [[PseudoVADD_VX_M1_:%[0-9]+]]:vr = PseudoVADD_VX_M1 [[PseudoVID_V_M1_]], [[PHI]], -1, 6, implicit $vl, implicit $vtype
; CHECK-NEXT: [[MUL:%[0-9]+]]:gpr = MUL [[PHI]], [[SRLI]]
; CHECK-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[COPY]], [[MUL]]
; FIXME: We insert a SEW=32,LMUL=1/2 VSETVLI here but no SEW=64,LMUL=1
; VSETVLI before the VADD above. This misconfigures the VADD in the case that
; the loop takes its backedge.
; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 87, implicit-def $vl, implicit-def $vtype, implicit $vl
; CHECK-NEXT: PseudoVSE32_V_MF2 killed [[PseudoVADD_VX_M1_]], killed [[ADD]], -1, 5, implicit $vl, implicit $vtype
; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[PHI]], 1
; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 88, implicit-def $vl, implicit-def $vtype, implicit $vl
; CHECK-NEXT: BLTU [[ADDI]], [[COPY1]], %bb.1
; CHECK-NEXT: PseudoBR %bb.2
; CHECK-NEXT: {{ $}}