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[InstCombine] Add tests for cttz of abs intrinsic (NFC)

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This commit is contained in:
Nikita Popov 2020-09-05 12:22:42 +02:00
parent d401e376e4
commit 1903a1afd9
1 changed files with 34 additions and 11 deletions
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45
llvm/test/Transforms/InstCombine/cttz-abs.ll
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@ -3,7 +3,7 @@
define i32 @cttz_abs(i32 %x) {
; CHECK-LABEL: @cttz_abs(
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), [[RNG0:!range !.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@ -29,7 +29,7 @@ define i32 @cttz_abs2(i32 %x) {
; CHECK-LABEL: @cttz_abs2(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: call void @use_cond(i1 [[C]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, 0
@ -44,7 +44,7 @@ define i32 @cttz_abs3(i32 %x) {
; CHECK-LABEL: @cttz_abs3(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: call void @use_cond(i1 [[C]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, -1
@ -57,7 +57,7 @@ define i32 @cttz_abs3(i32 %x) {
define i32 @cttz_abs4(i32 %x) {
; CHECK-LABEL: @cttz_abs4(
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@ -69,7 +69,7 @@ define i32 @cttz_abs4(i32 %x) {
define i32 @cttz_nabs(i32 %x) {
; CHECK-LABEL: @cttz_nabs(
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@ -93,7 +93,7 @@ define <2 x i64> @cttz_nabs_vec(<2 x i64> %x) {
define i64 @cttz_abs_64(i64 %x) {
; CHECK-LABEL: @cttz_abs_64(
; CHECK-NEXT: [[R:%.*]] = call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range !1
; CHECK-NEXT: [[R:%.*]] = call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), [[RNG1:!range !.*]]
; CHECK-NEXT: ret i64 [[R]]
;
%c = icmp slt i64 %x, 0
@ -109,7 +109,7 @@ define i32 @cttz_abs_multiuse(i32 %x) {
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@ -126,7 +126,7 @@ define i32 @cttz_nabs_multiuse(i32 %x) {
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@ -144,7 +144,7 @@ define i32 @no_cttz_abs(i32 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 2
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 2
@ -159,7 +159,7 @@ define i32 @no_cttz_abs2(i32 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[S:%.*]] = sub i32 1, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@ -175,7 +175,7 @@ define i32 @no_cttz_abs3(i32 %x) {
; CHECK-NEXT: call void @use_cond(i1 [[C]])
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, -2
@ -216,9 +216,32 @@ define <2 x i64> @no_cttz_nabs_vec(<2 x i64> %x) {
ret <2 x i64> %r
}
define i32 @cttz_abs_intrin(i32 %x) {
; CHECK-LABEL: @cttz_abs_intrin(
; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 false), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
%r = call i32 @llvm.cttz.i32(i32 %a, i1 false)
ret i32 %r
}
define i32 @cttz_nabs_intrin(i32 %x) {
; CHECK-LABEL: @cttz_nabs_intrin(
; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 false), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
%n = sub i32 0, %a
%r = call i32 @llvm.cttz.i32(i32 %n, i1 false)
ret i32 %r
}
declare void @use_cond(i1)
declare void @use_abs(i32)
declare i32 @llvm.cttz.i32(i32, i1)
declare i64 @llvm.cttz.i64(i64)
declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
declare i32 @llvm.abs.i32(i32, i1)