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[AMDGPU] Regenerate xor3-i1-const.ll test(NFC)

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chenglin.bi 2022-04-07 19:08:59 +08:00
parent d09d297c5d
commit 094e80882c
1 changed files with 17 additions and 3 deletions
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20
llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
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@ -1,10 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
; This test used to crash
; GCN-LABEL: {{^}}xor3_i1_const:
; GCN: s_xor_b64 s[{{[0-9:]+}}], s[{{[0-9:]+}}], -1
; GCN: s_xor_b64 s[{{[0-9:]+}}], s[{{[0-9:]+}}], -1
define amdgpu_ps float @xor3_i1_const(float inreg %arg1, i32 inreg %arg2) {
; GCN-LABEL: xor3_i1_const:
; GCN: ; %bb.0: ; %main_body
; GCN-NEXT: v_mov_b32_e32 v1, 0x42640000
; GCN-NEXT: s_mov_b32 m0, s1
; GCN-NEXT: v_cmp_lt_f32_e64 s[2:3], s0, 0
; GCN-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1
; GCN-NEXT: v_interp_p2_f32 v0, v0, attr0.x
; GCN-NEXT: s_and_b64 s[2:3], s[2:3], vcc
; GCN-NEXT: v_cmp_gt_f32_e64 s[0:1], 0, v0
; GCN-NEXT: s_xor_b64 s[4:5], s[2:3], -1
; GCN-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
; GCN-NEXT: s_xor_b64 s[2:3], s[0:1], s[2:3]
; GCN-NEXT: s_xor_b64 s[2:3], s[2:3], -1
; GCN-NEXT: s_or_b64 s[0:1], s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s[0:1]
; GCN-NEXT: ; return to shader part epilog
main_body:
%tmp26 = fcmp nsz olt float %arg1, 0.000000e+00
%tmp28 = call nsz float @llvm.amdgcn.interp.p2(float undef, float undef, i32 0, i32 0, i32 %arg2)