diff --git a/.gitignore b/.gitignore
index d18f0e8..2e4f618 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,3 +3,4 @@ dist/
 *.o
 *.gtkw
 *.vcd
+*.v
diff --git a/pyproject.toml b/pyproject.toml
index 32fdc81..ab9df3e 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -13,6 +13,7 @@ amaranth = "^0.3"
 
 [tool.poetry.scripts]
 sim = "teuthida.sim:start"
+verilog = "teuthida.gen:gen_verilog"
 
 [build-system]
 requires = ["poetry-core>=1.0.0"]
diff --git a/teuthida/gen.py b/teuthida/gen.py
new file mode 100644
index 0000000..57368e7
--- /dev/null
+++ b/teuthida/gen.py
@@ -0,0 +1,9 @@
+from amaranth.back import verilog
+from . import Cpu
+
+def gen_verilog():
+    cpu = Cpu()
+
+    with open('teuthida.v', 'w') as f:
+        f.write(verilog.convert(cpu))
+