diff --git a/.cirrus.yml b/.cirrus.yml
index 0e3b2d4268..7b5cb02102 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -556,8 +556,6 @@ task:
   # - Use -fmax-errors, as particularly cpluspluscheck can be very verbose
   # - XXX have to disable ICU to avoid errors:
   #   https://postgr.es/m/20220323002024.f2g6tivduzrktgfa%40alap3.anarazel.de
-  # - XXX: the -Wno-register avoids verbose warnings:
-  #   https://postgr.es/m/20220308181837.aun3tdtdvao4vb7o%40alap3.anarazel.de
   ###
   always:
     headers_headerscheck_script: |
@@ -569,7 +567,7 @@ task:
       make -s -j${BUILD_JOBS} clean
       time make -s headerscheck EXTRAFLAGS='-fmax-errors=10'
     headers_cpluspluscheck_script: |
-      time make -s cpluspluscheck EXTRAFLAGS='-Wno-register -fmax-errors=10'
+      time make -s cpluspluscheck EXTRAFLAGS='-fmax-errors=10'
 
   always:
     upload_caches: ccache
diff --git a/src/backend/regex/regexec.c b/src/backend/regex/regexec.c
index 29c364f3db..3d9ff2e607 100644
--- a/src/backend/regex/regexec.c
+++ b/src/backend/regex/regexec.c
@@ -192,7 +192,7 @@ pg_regexec(regex_t *re,
 		   int flags)
 {
 	struct vars var;
-	register struct vars *v = &var;
+	struct vars *v = &var;
 	int			st;
 	size_t		n;
 	size_t		i;
diff --git a/src/include/port/atomics/arch-x86.h b/src/include/port/atomics/arch-x86.h
index cef1ba724c..6c0b917f12 100644
--- a/src/include/port/atomics/arch-x86.h
+++ b/src/include/port/atomics/arch-x86.h
@@ -140,7 +140,7 @@ pg_spin_delay_impl(void)
 static inline bool
 pg_atomic_test_set_flag_impl(volatile pg_atomic_flag *ptr)
 {
-	register char _res = 1;
+	char		_res = 1;
 
 	__asm__ __volatile__(
 		"	lock			\n"
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 65aa66c598..4225d9b7fc 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -142,7 +142,7 @@ typedef unsigned char slock_t;
 static __inline__ int
 tas(volatile slock_t *lock)
 {
-	register slock_t _res = 1;
+	slock_t		_res = 1;
 
 	/*
 	 * Use a non-locking test before asserting the bus lock.  Note that the
@@ -223,7 +223,7 @@ typedef unsigned char slock_t;
 static __inline__ int
 tas(volatile slock_t *lock)
 {
-	register slock_t _res = 1;
+	slock_t		_res = 1;
 
 	__asm__ __volatile__(
 		"	lock			\n"
@@ -356,7 +356,7 @@ typedef unsigned char slock_t;
 static __inline__ int
 tas(volatile slock_t *lock)
 {
-	register slock_t _res;
+	slock_t		_res;
 
 	/*
 	 *	See comment in src/backend/port/tas/sunstudio_sparc.s for why this
@@ -511,9 +511,9 @@ typedef unsigned int slock_t;
 static __inline__ int
 tas(volatile slock_t *lock)
 {
-	register volatile slock_t *_l = lock;
-	register int _res;
-	register int _tmp;
+	volatile slock_t *_l = lock;
+	int			_res;
+	int			_tmp;
 
 	__asm__ __volatile__(
 		"       .set push           \n"
@@ -574,7 +574,7 @@ static __inline__ int
 tas(volatile slock_t *lock)
 {
 	volatile int *lockword = TAS_ACTIVE_WORD(lock);
-	register int lockval;
+	int			lockval;
 
 	/*
 	 * The LDCWX instruction atomically clears the target word and